/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_def.h | 416 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1230 #define pMDMA1_D0_IRQ_STATUS ((uint16_t volatile *)MDMA1_D0_IRQ_STATUS) 1231 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1232 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_def.h | 416 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1230 #define pMDMA1_D0_IRQ_STATUS ((uint16_t volatile *)MDMA1_D0_IRQ_STATUS) 1231 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1232 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_def.h | 416 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1230 #define pMDMA1_D0_IRQ_STATUS ((uint16_t volatile *)MDMA1_D0_IRQ_STATUS) 1231 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1232 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_def.h | 416 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1230 #define pMDMA1_D0_IRQ_STATUS ((uint16_t volatile *)MDMA1_D0_IRQ_STATUS) 1231 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1232 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_def.h | 416 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1230 #define pMDMA1_D0_IRQ_STATUS ((uint16_t volatile *)MDMA1_D0_IRQ_STATUS) 1231 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1232 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_def.h | 416 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1230 #define pMDMA1_D0_IRQ_STATUS ((uint16_t volatile *)MDMA1_D0_IRQ_STATUS) 1231 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1232 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/ |
H A D | ADSP-EDN-DUAL-CORE-extended_def.h | 416 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | ADSP-EDN-DUAL-CORE-extended_cdef.h | 1230 #define pMDMA1_D0_IRQ_STATUS ((uint16_t volatile *)MDMA1_D0_IRQ_STATUS) 1231 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1232 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf561/ |
H A D | BF561_def.h | 418 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | BF561_cdef.h | 825 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 826 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf538/ |
H A D | BF538_def.h | 569 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 macro
|
H A D | BF538_cdef.h | 1123 #define bfin_read_MDMA1_D0_IRQ_STATUS() bfin_read16(MDMA1_D0_IRQ_STATUS) 1124 #define bfin_write_MDMA1_D0_IRQ_STATUS(val) bfin_write16(MDMA1_D0_IRQ_STATUS, val)
|
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/ |
H A D | defBF561.h | 528 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 /*MemDMA1 Stream 0 Destination Interrupt/Status */ macro
|
H A D | cdefBF561.h | 490 #define pMDMA1_D0_IRQ_STATUS ((volatile unsigned short *)MDMA1_D0_IRQ_STATUS)
|
H A D | cdefBF538.h | 407 #define pMDMA1_D0_IRQ_STATUS ((volatile unsigned short *)MDMA1_D0_IRQ_STATUS)
|
H A D | defBF538.h | 418 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 /* MemDMA1 Stream 0 Destination Interrupt/Status Register … macro
|
H A D | cdefBF539.h | 790 #define pMDMA1_D0_IRQ_STATUS ((volatile unsigned short *)MDMA1_D0_IRQ_STATUS)
|
H A D | defBF539.h | 656 #define MDMA1_D0_IRQ_STATUS 0xFFC01F28 /* MemDMA1 Stream 0 Destination Interrupt/Status Register … macro
|