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Searched refs:PL0_RW (Results 1 – 22 of 22) sorted by relevance

/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dhelper.c1993 .access = PL0_RW,
2005 .access = PL0_RW, .type = ARM_CP_IO,
2255 .access = PL0_RW,
2258 .access = PL0_RW,
2806 .access = PL0_RW,
2814 .access = PL0_RW,
2822 .access = PL0_RW,
2829 .access = PL0_RW,
2837 .access = PL0_RW,
6131 .access = PL0_RW, in register_cp_regs_for_features()
[all …]
H A Dcpu.h2351 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dhelper.c1993 .access = PL0_RW,
2005 .access = PL0_RW, .type = ARM_CP_IO,
2255 .access = PL0_RW,
2258 .access = PL0_RW,
2806 .access = PL0_RW,
2814 .access = PL0_RW,
2822 .access = PL0_RW,
2829 .access = PL0_RW,
2837 .access = PL0_RW,
6131 .access = PL0_RW, in register_cp_regs_for_features()
[all …]
H A Dcpu.h2351 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dhelper.c706 0, PL0_RW, NULL, 0, offsetof(CPUARMState, cp15.c9_pmcnten),
715 0, PL0_RW, NULL, 0, offsetof(CPUARMState, cp15.c9_pmovsr),
725 ARM_CP_CONST, PL0_RW, NULL, 0, 0,
729 ARM_CP_IO, PL0_RW, NULL, 0, 0,
732 ARM_CP_IO, PL0_RW, NULL, 0, 0,
743 ARM_CP_CONST, PL0_RW, NULL, 0, 0,
870 0, PL0_RW, NULL, 0, offsetof(CPUARMState, teehbr),
1767 ARM_CP_NZCV, PL0_RW, },
1772 0, PL0_RW, NULL, 0, 0,
1775 0, PL0_RW, NULL, 0, 0,
[all …]
H A Dcpu.h996 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dhelper.c706 0, PL0_RW, NULL, 0, offsetof(CPUARMState, cp15.c9_pmcnten),
715 0, PL0_RW, NULL, 0, offsetof(CPUARMState, cp15.c9_pmovsr),
725 ARM_CP_CONST, PL0_RW, NULL, 0, 0,
729 ARM_CP_IO, PL0_RW, NULL, 0, 0,
732 ARM_CP_IO, PL0_RW, NULL, 0, 0,
743 ARM_CP_CONST, PL0_RW, NULL, 0, 0,
870 0, PL0_RW, NULL, 0, offsetof(CPUARMState, teehbr),
1767 ARM_CP_NZCV, PL0_RW, },
1772 0, PL0_RW, NULL, 0, 0,
1775 0, PL0_RW, NULL, 0, 0,
[all …]
H A Dcpu.h996 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dhelper.c2163 .access = PL0_RW,
2175 .access = PL0_RW, .type = ARM_CP_IO,
2448 .access = PL0_RW,
2451 .access = PL0_RW,
3252 .access = PL0_RW,
3261 .access = PL0_RW,
3269 .access = PL0_RW,
3277 .access = PL0_RW,
3286 .access = PL0_RW,
6572 .access = PL0_RW, in define_pmu_regs()
[all …]
H A Dcpu.h2492 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dhelper.c2210 .access = PL0_RW,
2222 .access = PL0_RW, .type = ARM_CP_IO,
2495 .access = PL0_RW,
2498 .access = PL0_RW,
3299 .access = PL0_RW,
3308 .access = PL0_RW,
3316 .access = PL0_RW,
3324 .access = PL0_RW,
3333 .access = PL0_RW,
6605 .access = PL0_RW, in define_pmu_regs()
[all …]
H A Dcpu.h2438 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dhelper.c2210 .access = PL0_RW,
2222 .access = PL0_RW, .type = ARM_CP_IO,
2495 .access = PL0_RW,
2498 .access = PL0_RW,
3299 .access = PL0_RW,
3308 .access = PL0_RW,
3316 .access = PL0_RW,
3324 .access = PL0_RW,
3333 .access = PL0_RW,
6604 .access = PL0_RW, in define_pmu_regs()
[all …]
H A Dcpu.h2438 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dhelper.c2143 .access = PL0_RW,
2155 .access = PL0_RW, .type = ARM_CP_IO,
2442 .access = PL0_RW,
2445 .access = PL0_RW,
3249 .access = PL0_RW,
3258 .access = PL0_RW,
3266 .access = PL0_RW,
3274 .access = PL0_RW,
3283 .access = PL0_RW,
6846 .access = PL0_RW, in define_pmu_regs()
[all …]
H A Dcpu.h2678 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dhelper.c1919 .access = PL0_RW,
1931 .access = PL0_RW, .type = ARM_CP_IO,
2218 .access = PL0_RW,
2221 .access = PL0_RW,
3025 .access = PL0_RW,
3034 .access = PL0_RW,
3042 .access = PL0_RW,
3050 .access = PL0_RW,
3059 .access = PL0_RW,
6622 .access = PL0_RW, in define_pmu_regs()
[all …]
H A Dcpu.h2678 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dhelper.c2187 .access = PL0_RW,
2199 .access = PL0_RW, .type = ARM_CP_IO,
2472 .access = PL0_RW,
2475 .access = PL0_RW,
3279 .access = PL0_RW,
3288 .access = PL0_RW,
3296 .access = PL0_RW,
3304 .access = PL0_RW,
3313 .access = PL0_RW,
6695 .access = PL0_RW, in define_pmu_regs()
[all …]
H A Dcpu.h2641 #define PL0_RW (PL0_R | PL0_W) macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dhelper.c1325 .access = PL0_RW, .type = ARM_CP_ALIAS,
1332 .access = PL0_RW, .accessfn = pmreg_access,
1336 .access = PL0_RW,
1343 .access = PL0_RW, .accessfn = pmreg_access,
1348 .access = PL0_RW,
1365 .access = PL0_RW, .type = ARM_CP_ALIAS,
1562 .access = PL0_RW,
1565 .access = PL0_RW,
3429 .access = PL0_RW, .type = ARM_CP_NZCV },
4994 .access = PL0_RW, in register_cp_regs_for_features()
[all …]
H A Dcpu.h2045 #define PL0_RW (PL0_R | PL0_W) macro