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Searched refs:PL3_RW (Results 1 – 25 of 31) sorted by relevance

12

/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dhelper.c5107 .access = PL3_RW, .resetvalue = 0,
5111 .access = PL3_RW, .resetvalue = 0,
5119 .access = PL3_RW, .resetvalue = 0,
5123 .access = PL3_RW,
5134 .access = PL3_RW,
5145 .access = PL3_RW,
5158 .access = PL3_RW, .resetvalue = 0,
5448 .access = PL3_RW, .type = ARM_CP_SVE,
6561 .access = PL3_RW, in register_cp_regs_for_features()
6591 .access = PL3_RW | PL1_R, in register_cp_regs_for_features()
[all …]
H A Dcpu.h2348 #define PL3_RW (PL3_R | PL3_W) macro
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dhelper.c5107 .access = PL3_RW, .resetvalue = 0,
5111 .access = PL3_RW, .resetvalue = 0,
5119 .access = PL3_RW, .resetvalue = 0,
5123 .access = PL3_RW,
5134 .access = PL3_RW,
5145 .access = PL3_RW,
5158 .access = PL3_RW, .resetvalue = 0,
5448 .access = PL3_RW, .type = ARM_CP_SVE,
6561 .access = PL3_RW, in register_cp_regs_for_features()
6591 .access = PL3_RW | PL1_R, in register_cp_regs_for_features()
[all …]
H A Dcpu.h2348 #define PL3_RW (PL3_R | PL3_W) macro
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dhelper.c5729 .access = PL3_RW, .resetvalue = 0,
5733 .access = PL3_RW, .resetvalue = 0,
5741 .access = PL3_RW, .resetvalue = 0,
5745 .access = PL3_RW,
5756 .access = PL3_RW,
5767 .access = PL3_RW,
5780 .access = PL3_RW, .resetvalue = 0,
6247 .access = PL3_RW, .type = ARM_CP_SVE,
6938 .access = PL3_RW,
7755 .access = PL3_RW, in register_cp_regs_for_features()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dhelper.c5765 .access = PL3_RW, .resetvalue = 0,
5769 .access = PL3_RW, .resetvalue = 0,
5777 .access = PL3_RW, .resetvalue = 0,
5781 .access = PL3_RW,
5792 .access = PL3_RW,
5803 .access = PL3_RW,
5816 .access = PL3_RW, .resetvalue = 0,
6280 .access = PL3_RW, .type = ARM_CP_SVE,
7637 .access = PL3_RW, in register_cp_regs_for_features()
7667 .access = PL3_RW | PL1_R, in register_cp_regs_for_features()
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dhelper.c5765 .access = PL3_RW, .resetvalue = 0,
5769 .access = PL3_RW, .resetvalue = 0,
5777 .access = PL3_RW, .resetvalue = 0,
5781 .access = PL3_RW,
5792 .access = PL3_RW,
5803 .access = PL3_RW,
5816 .access = PL3_RW, .resetvalue = 0,
6280 .access = PL3_RW, .type = ARM_CP_SVE,
7636 .access = PL3_RW, in register_cp_regs_for_features()
7666 .access = PL3_RW | PL1_R, in register_cp_regs_for_features()
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dhelper.c3958 .access = PL3_RW, .type = ARM_CP_ALIAS,
4205 .access = PL3_RW, .resetvalue = 0,
4209 .access = PL3_RW, .resetvalue = 0,
4221 .access = PL3_RW,
4232 .access = PL3_RW,
4243 .access = PL3_RW,
4256 .access = PL3_RW, .resetvalue = 0,
4533 .access = PL3_RW, .type = ARM_CP_SVE,
5301 .access = PL3_RW, in register_cp_regs_for_features()
5331 .access = PL3_RW | PL1_R, in register_cp_regs_for_features()
[all …]
H A Dcpu.h2042 #define PL3_RW (PL3_R | PL3_W) macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dhelper.c5982 .access = PL3_RW, .resetvalue = 0,
5986 .access = PL3_RW, .resetvalue = 0,
5994 .access = PL3_RW, .resetvalue = 0,
5998 .access = PL3_RW,
6009 .access = PL3_RW,
6020 .access = PL3_RW,
6033 .access = PL3_RW, .resetvalue = 0,
6512 .access = PL3_RW, .type = ARM_CP_SVE,
7364 .access = PL3_RW,
8200 .access = PL3_RW, in register_cp_regs_for_features()
[all …]
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dhelper.c5758 .access = PL3_RW, .resetvalue = 0,
5762 .access = PL3_RW, .resetvalue = 0,
5770 .access = PL3_RW, .resetvalue = 0,
5774 .access = PL3_RW,
5785 .access = PL3_RW,
5796 .access = PL3_RW,
5809 .access = PL3_RW, .resetvalue = 0,
6288 .access = PL3_RW, .type = ARM_CP_SVE,
7140 .access = PL3_RW,
7976 .access = PL3_RW, in register_cp_regs_for_features()
[all …]
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dhelper.c5843 .access = PL3_RW, .resetvalue = 0,
5847 .access = PL3_RW, .resetvalue = 0,
5855 .access = PL3_RW, .resetvalue = 0,
5859 .access = PL3_RW,
5870 .access = PL3_RW,
5881 .access = PL3_RW,
5894 .access = PL3_RW, .resetvalue = 0,
6361 .access = PL3_RW, .type = ARM_CP_SVE,
7061 .access = PL3_RW,
7881 .access = PL3_RW, in register_cp_regs_for_features()
[all …]
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dhelper.c1983 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, elr_el[3]) },
1985 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.esr_el[3]) },
1987 0, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.far_el[3]) },
1989 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, banked_spsr[7]) },
1991 0, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.vbar_el[3]),
1994 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.scr_el3),
2951 mask = PL3_RW; in define_one_arm_cp_reg_with_opaque()
H A Dcpu.h993 #define PL3_RW (PL3_R | PL3_W) macro
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/
H A Dhelper.c1983 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, elr_el[3]) },
1985 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.esr_el[3]) },
1987 0, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.far_el[3]) },
1989 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, banked_spsr[7]) },
1991 0, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.vbar_el[3]),
1994 ARM_CP_NO_MIGRATE, PL3_RW, NULL, 0, offsetof(CPUARMState, cp15.scr_el3),
2951 mask = PL3_RW; in define_one_arm_cp_reg_with_opaque()
H A Dcpu.h993 #define PL3_RW (PL3_R | PL3_W) macro
/dports/emulators/qemu42/qemu-4.2.1/hw/intc/
H A Darm_gicv3_cpuif.c2271 .access = PL3_RW,
2278 .access = PL3_RW,
2287 .access = PL3_RW,
/dports/emulators/qemu/qemu-6.2.0/hw/intc/
H A Darm_gicv3_cpuif.c2298 .access = PL3_RW,
2305 .access = PL3_RW,
2314 .access = PL3_RW,
/dports/emulators/qemu60/qemu-6.0.0/hw/intc/
H A Darm_gicv3_cpuif.c2275 .access = PL3_RW,
2282 .access = PL3_RW,
2291 .access = PL3_RW,
/dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/
H A Darm_gicv3_cpuif.c2271 .access = PL3_RW,
2278 .access = PL3_RW,
2287 .access = PL3_RW,
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/
H A Darm_gicv3_cpuif.c2269 .access = PL3_RW,
2276 .access = PL3_RW,
2285 .access = PL3_RW,
/dports/emulators/qemu5/qemu-5.2.0/hw/intc/
H A Darm_gicv3_cpuif.c2275 .access = PL3_RW,
2282 .access = PL3_RW,
2291 .access = PL3_RW,
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/
H A Darm_gicv3_cpuif.c2274 .access = PL3_RW,
2281 .access = PL3_RW,
2290 .access = PL3_RW,
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/
H A Darm_gicv3_cpuif.c2274 .access = PL3_RW,
2281 .access = PL3_RW,
2290 .access = PL3_RW,
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/
H A Darm_gicv3_cpuif.c2298 .access = PL3_RW,
2305 .access = PL3_RW,
2314 .access = PL3_RW,

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