| /dports/devel/asl/asl-current/include/avr/ |
| H A D | regt1024.inc | 74 PUEA port 0x03 ; Pull-Up Enable Port A
75 PUEA0 avrbit PUEA,0
76 PUEA1 avrbit PUEA,1
77 PUEA2 avrbit PUEA,2
79 PUEA3 avrbit PUEA,3
80 PUEA4 avrbit PUEA,4
81 PUEA5 avrbit PUEA,5
82 PUEA6 avrbit PUEA,6
83 PUEA7 avrbit PUEA,7
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| H A D | regtn20.inc | 76 PUEA port 0x03 ; Pull-Up Enable Port A
77 PUEA0 avrbit PUEA,0
78 PUEA1 avrbit PUEA,1
79 PUEA2 avrbit PUEA,2
80 PUEA3 avrbit PUEA,3
81 PUEA4 avrbit PUEA,4
82 PUEA5 avrbit PUEA,5
83 PUEA6 avrbit PUEA,6
84 PUEA7 avrbit PUEA,7
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| H A D | regtn40.inc | 79 PUEA port 0x03 ; Pull-Up Enable Port A
80 PUEA0 avrbit PUEA,0
81 PUEA1 avrbit PUEA,1
82 PUEA2 avrbit PUEA,2
83 PUEA3 avrbit PUEA,3
84 PUEA4 avrbit PUEA,4
85 PUEA5 avrbit PUEA,5
86 PUEA6 avrbit PUEA,6
87 PUEA7 avrbit PUEA,7
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| H A D | regtn828.inc | 107 PUEA port 0x03 ; Pull-up Enable Port A
108 PUEA0 avrbit PUEA,0
109 PUEA1 avrbit PUEA,1
110 PUEA2 avrbit PUEA,2
111 PUEA3 avrbit PUEA,3
112 PUEA4 avrbit PUEA,4
113 PUEA5 avrbit PUEA,5
114 PUEA6 avrbit PUEA,6
115 PUEA7 avrbit PUEA,7
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| H A D | regtn1634.inc | 112 PUEA port 0x12 ; Pull-Up Enable Port A
113 PUEA0 avrbit PUEA,0
114 PUEA1 avrbit PUEA,1
115 PUEA2 avrbit PUEA,2
116 PUEA3 avrbit PUEA,3
117 PUEA4 avrbit PUEA,4
118 PUEA5 avrbit PUEA,5
119 PUEA6 avrbit PUEA,6
120 PUEA7 avrbit PUEA,7
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| H A D | regtnx41.inc | 103 PUEA sfr 0x63 ; Pull-up Enable Port A
104 PUEA0 avrbit PUEA,0
105 PUEA1 avrbit PUEA,1
106 PUEA2 avrbit PUEA,2
107 PUEA3 avrbit PUEA,3
108 PUEA4 avrbit PUEA,4
109 PUEA5 avrbit PUEA,5
110 PUEA6 avrbit PUEA,6
111 PUEA7 avrbit PUEA,7
|
| /dports/devel/avr-libc/avr-libc-2.0.0/include/avr/ |
| H A D | iotn828.h | 83 #define PUEA _SFR_IO8(0x03) macro
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| H A D | iotn1634.h | 195 #define PUEA _SFR_IO8(0x12) macro
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| H A D | iotn40.h | 84 #define PUEA _SFR_IO8(0x03) macro
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| H A D | iotn20.h | 84 #define PUEA _SFR_IO8(0x03) macro
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| H A D | iotn441.h | 407 #define PUEA _SFR_MEM8(0x63) macro
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| H A D | iotn841.h | 407 #define PUEA _SFR_MEM8(0x63) macro
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| /dports/devel/avra/avra-1.4.2/includes/ |
| H A D | tn20def.inc | 119 .equ PUEA = 0x03
475 ; PUEA - Pull-up Enable Control Register
|
| /dports/editors/fpc-ide/fpc-3.2.2/rtl/embedded/avr/ |
| H A D | attiny20.pp | 63 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny40.pp | 75 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny1634.pp | 27 PUEA : byte absolute $00+$32; // Pull-up Enable Control Register
|
| /dports/lang/fpc-source/fpc-3.2.2/rtl/embedded/avr/ |
| H A D | attiny20.pp | 63 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny40.pp | 75 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny1634.pp | 27 PUEA : byte absolute $00+$32; // Pull-up Enable Control Register
|
| /dports/lang/fpc/fpc-3.2.2/rtl/embedded/avr/ |
| H A D | attiny20.pp | 63 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny40.pp | 75 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny1634.pp | 27 PUEA : byte absolute $00+$32; // Pull-up Enable Control Register
|
| /dports/lang/fpc-utils/fpc-3.2.2/rtl/embedded/avr/ |
| H A D | attiny20.pp | 63 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny40.pp | 75 PUEA : byte absolute $00+$03; // Pull-up Enable Control Register
|
| H A D | attiny1634.pp | 27 PUEA : byte absolute $00+$32; // Pull-up Enable Control Register
|