/dports/devel/binutils/binutils-2.37/bfd/ |
H A D | coff-sh.c | 1588 #define SETSR0 (0x200) macro 1857 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1858 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1912 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1914 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1915 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1916 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2103 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2235 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2251 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/devel/arm-elf-binutils/binutils-2.37/bfd/ |
H A D | coff-sh.c | 1588 #define SETSR0 (0x200) macro 1857 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1858 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1912 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1914 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1915 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1916 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2103 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2235 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2251 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/devel/gnulibiberty/binutils-2.37/bfd/ |
H A D | coff-sh.c | 1588 #define SETSR0 (0x200) macro 1857 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1858 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1912 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1914 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1915 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1916 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2103 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2235 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2251 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/devel/gdb/gdb-11.1/bfd/ |
H A D | coff-sh.c | 1588 #define SETSR0 (0x200) macro 1857 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1858 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1912 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1914 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1915 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1916 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2103 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2235 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2251 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/bfd/ |
H A D | coff-sh.c | 1578 #define SETSR0 (0x200) macro 1847 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1848 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1902 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1904 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1905 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1906 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2093 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2225 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2241 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/devel/avr-gdb/gdb-7.3.1/bfd/ |
H A D | coff-sh.c | 1596 #define SETSR0 (0x200) macro 1883 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1884 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1938 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1940 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1941 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1942 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2146 if ((f & SETSR0) != 0 2269 if ((f1 & SETSR0) != 0 2285 if ((f2 & SETSR0) != 0 [all …]
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/dports/lang/gnatdroid-binutils/binutils-2.27/bfd/ |
H A D | coff-sh.c | 1578 #define SETSR0 (0x200) macro 1847 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1848 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1902 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1904 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1905 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1906 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2093 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2225 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2241 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/devel/gdb761/gdb-7.6.1/bfd/ |
H A D | coff-sh.c | 1580 #define SETSR0 (0x200) macro 1849 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1850 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1904 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1906 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1907 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1908 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2095 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2227 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2243 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/bfd/ |
H A D | coff-sh.c | 1589 #define SETSR0 (0x200) macro 1858 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1859 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1913 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1915 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1916 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1917 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2104 if ((f & SETSR0) != 0 in sh_insn_sets_reg() 2236 if ((f1 & SETSR0) != 0 in sh_insns_conflict() 2252 if ((f2 & SETSR0) != 0 in sh_insns_conflict() [all …]
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/bfd/ |
H A D | coff-sh.c | 1570 #define SETSR0 (0x200) macro 1857 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1858 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1912 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1914 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1915 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1916 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2120 if ((f & SETSR0) != 0 2243 if ((f1 & SETSR0) != 0 2259 if ((f2 & SETSR0) != 0 [all …]
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/dports/devel/djgpp-binutils/binutils-2.17/bfd/ |
H A D | coff-sh.c | 1570 #define SETSR0 (0x200) macro 1857 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1858 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 1912 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 1914 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 1915 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 1916 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2120 if ((f & SETSR0) != 0 2243 if ((f1 & SETSR0) != 0 2259 if ((f2 & SETSR0) != 0 [all …]
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/bfd/ |
H A D | coff-sh.c | 1618 #define SETSR0 (0x200) 1963 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1964 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 2018 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 2020 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 2021 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 2022 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2226 if ((f & SETSR0) != 0 2349 if ((f1 & SETSR0) != 0 2365 if ((f2 & SETSR0) != 0 [all …]
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/bfd/ |
H A D | coff-sh.c | 1618 #define SETSR0 (0x200) macro 1963 { 0x8400, LOAD | SETSR0 | USES2 }, /* mov.b @(disp,rm),r0 */ 1964 { 0x8500, LOAD | SETSR0 | USES2 }, /* mov.w @(disp,rn),r0 */ 2018 { 0xc700, SETSR0 }, /* mova @(disp,pc),r0 */ 2020 { 0xc900, SETSR0 | USESR0 }, /* and #imm,r0 */ 2021 { 0xca00, SETSR0 | USESR0 }, /* xor #imm,r0 */ 2022 { 0xcb00, SETSR0 | USESR0 }, /* or #imm,r0 */ 2226 if ((f & SETSR0) != 0 2349 if ((f1 & SETSR0) != 0 2365 if ((f2 & SETSR0) != 0 [all …]
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