| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
462 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
465 .addImm(ShiftImm); in expandAtomicBinOpSubword()
468 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 182 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
186 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
189 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
463 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
466 .addImm(ShiftImm); in expandAtomicBinOpSubword()
469 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 182 const unsigned ShiftImm =
186 .addImm(ShiftImm);
189 .addImm(ShiftImm);
463 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
466 .addImm(ShiftImm);
469 .addImm(ShiftImm);
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
185 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
188 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
560 .addImm(ShiftImm); in expandAtomicBinOpSubword()
563 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 181 const unsigned ShiftImm =
185 .addImm(ShiftImm);
188 .addImm(ShiftImm);
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
560 .addImm(ShiftImm);
563 .addImm(ShiftImm);
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 187 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
191 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
194 .addImm(ShiftImm); in expandAtomicCmpSwapSubword()
628 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
631 .addImm(ShiftImm); in expandAtomicBinOpSubword()
634 .addImm(ShiftImm); in expandAtomicBinOpSubword()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 213 uint64_t ShiftImm, bool SetFlags = false,
254 uint64_t ShiftImm);
1358 unsigned ShiftImm; in emitAddSub_ri() local
1360 ShiftImm = 0; in emitAddSub_ri()
1362 ShiftImm = 12; in emitAddSub_ri()
1391 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1409 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1434 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1451 if (ShiftImm >= 4) in emitAddSub_rx()
1479 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 213 uint64_t ShiftImm, bool SetFlags = false,
254 uint64_t ShiftImm);
1358 unsigned ShiftImm; in emitAddSub_ri() local
1360 ShiftImm = 0; in emitAddSub_ri()
1362 ShiftImm = 12; in emitAddSub_ri()
1391 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1409 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1434 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1451 if (ShiftImm >= 4) in emitAddSub_rx()
1479 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 212 uint64_t ShiftImm, bool SetFlags = false,
250 unsigned RHSReg, uint64_t ShiftImm);
1325 unsigned ShiftImm; in emitAddSub_ri() local
1327 ShiftImm = 0; in emitAddSub_ri()
1329 ShiftImm = 12; in emitAddSub_ri()
1358 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1375 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1400 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1416 if (ShiftImm >= 4) in emitAddSub_rx()
1444 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 212 uint64_t ShiftImm, bool SetFlags = false,
250 unsigned RHSReg, uint64_t ShiftImm);
1325 unsigned ShiftImm; in emitAddSub_ri() local
1327 ShiftImm = 0; in emitAddSub_ri()
1329 ShiftImm = 12; in emitAddSub_ri()
1358 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1375 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1400 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1416 if (ShiftImm >= 4) in emitAddSub_rx()
1444 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 213 uint64_t ShiftImm, bool SetFlags = false,
254 uint64_t ShiftImm);
1358 unsigned ShiftImm; in emitAddSub_ri() local
1360 ShiftImm = 0; in emitAddSub_ri()
1362 ShiftImm = 12; in emitAddSub_ri()
1391 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1409 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1434 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1451 if (ShiftImm >= 4) in emitAddSub_rx()
1479 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 213 uint64_t ShiftImm, bool SetFlags = false,
254 uint64_t ShiftImm);
1358 unsigned ShiftImm; in emitAddSub_ri() local
1360 ShiftImm = 0; in emitAddSub_ri()
1362 ShiftImm = 12; in emitAddSub_ri()
1391 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1409 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1434 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1451 if (ShiftImm >= 4) in emitAddSub_rx()
1479 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 213 uint64_t ShiftImm, bool SetFlags = false,
254 uint64_t ShiftImm);
1360 unsigned ShiftImm; in emitAddSub_ri() local
1362 ShiftImm = 0; in emitAddSub_ri()
1364 ShiftImm = 12; in emitAddSub_ri()
1393 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1411 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1436 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1453 if (ShiftImm >= 4) in emitAddSub_rx()
1481 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 212 uint64_t ShiftImm, bool SetFlags = false,
250 unsigned RHSReg, uint64_t ShiftImm);
1325 unsigned ShiftImm; in emitAddSub_ri() local
1327 ShiftImm = 0; in emitAddSub_ri()
1329 ShiftImm = 12; in emitAddSub_ri()
1358 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1375 if (ShiftImm >= RetVT.getSizeInBits()) in emitAddSub_rs()
1400 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1416 if (ShiftImm >= 4) in emitAddSub_rx()
1444 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()
[all …]
|