/dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 402 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 405 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 406 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 407 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 408 return ShiftVT; in getShiftAmountTyForConstant() 418 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 420 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 430 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 433 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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H A D | DAGCombiner.cpp | 3507 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local 3953 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitUDIVLike() local 4147 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMULHU() local 4148 SDValue Trunc = DAG.getZExtOrTrunc(SRLAmt, DL, ShiftVT); in visitMULHU() 6112 EVT ShiftVT = OppShift.getOperand(1).getValueType(); in extractShiftForRotate() local 7437 EVT ShiftVT = C1->getValueType(0); in visitRotate() local 7461 EVT ShiftVT = N1.getValueType(); in visitSHL() local 7583 Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, Sum, N1); in visitSHL() 7754 EVT ShiftVT = N1.getValueType(); in visitSRA() local 7755 EVT ShiftSVT = ShiftVT.getScalarType(); in visitSRA() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 390 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 393 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 394 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 395 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 396 return ShiftVT; in getShiftAmountTyForConstant() 406 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 408 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 418 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 421 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 402 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 405 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 406 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 407 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 408 return ShiftVT; in getShiftAmountTyForConstant() 418 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 420 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 430 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 433 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 349 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 352 if ((Log2_32(Val) + 1) > ShiftVT.getScalarSizeInBits()) in getShiftAmountTyForConstant() 353 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 354 return ShiftVT; in getShiftAmountTyForConstant() 364 EVT ShiftVT = getShiftAmountTyForConstant(DiffBits, NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 366 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 376 EVT ShiftVT = getShiftAmountTyForConstant(DiffBits, NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 379 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 433 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 436 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 437 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 438 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 439 return ShiftVT; in getShiftAmountTyForConstant() 455 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 457 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 467 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 470 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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H A D | LegalizeDAG.cpp | 1561 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1565 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1568 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1569 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1571 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1572 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2489 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2490 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 427 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 430 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 431 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 432 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 433 return ShiftVT; in getShiftAmountTyForConstant() 449 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 451 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 461 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 464 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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H A D | LegalizeDAG.cpp | 1549 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1552 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1555 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1556 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1558 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1559 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2483 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2484 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 417 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 420 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 421 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 422 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 423 return ShiftVT; in getShiftAmountTyForConstant() 439 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 441 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 451 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 454 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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H A D | LegalizeDAG.cpp | 1546 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1549 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1552 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1553 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1555 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1556 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2445 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2446 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 1591 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1595 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1598 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1599 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1601 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1602 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2386 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2387 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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H A D | LegalizeIntegerTypes.cpp | 445 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 448 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 449 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 450 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 451 return ShiftVT; in getShiftAmountTyForConstant() 477 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 479 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 499 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 502 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 1591 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1595 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1598 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1599 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1601 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1602 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2386 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2387 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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H A D | LegalizeIntegerTypes.cpp | 445 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 448 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 449 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 450 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 451 return ShiftVT; in getShiftAmountTyForConstant() 477 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 479 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 499 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 502 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 1591 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1595 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1598 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1599 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1601 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1602 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2386 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2387 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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H A D | LegalizeIntegerTypes.cpp | 445 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 448 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 449 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 450 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 451 return ShiftVT; in getShiftAmountTyForConstant() 477 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 479 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 499 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 502 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 1617 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1621 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1624 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1625 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1627 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1628 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2412 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2413 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 1591 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1595 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1598 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1599 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1601 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1602 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2386 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2387 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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H A D | LegalizeIntegerTypes.cpp | 445 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 448 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 449 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 450 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 451 return ShiftVT; in getShiftAmountTyForConstant() 477 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 479 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 499 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 502 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 1591 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local 1595 ShiftVT = MagVT; in ExpandFCOPYSIGN() 1598 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1599 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 1601 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN() 1602 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN() 2386 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local 2387 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
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H A D | LegalizeIntegerTypes.cpp | 445 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 448 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 449 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 450 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 451 return ShiftVT; in getShiftAmountTyForConstant() 477 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 479 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 499 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 502 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 366 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 369 if ((Log2_32(Val) + 1) > ShiftVT.getScalarSizeInBits()) in getShiftAmountTyForConstant() 370 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 371 return ShiftVT; in getShiftAmountTyForConstant() 381 EVT ShiftVT = getShiftAmountTyForConstant(DiffBits, NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 383 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 393 EVT ShiftVT = getShiftAmountTyForConstant(DiffBits, NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 396 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 437 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 440 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 441 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 442 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 443 return ShiftVT; in getShiftAmountTyForConstant() 459 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 461 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 471 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 474 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 437 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local 440 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant() 441 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant() 442 ShiftVT = MVT::i32; in getShiftAmountTyForConstant() 443 return ShiftVT; in getShiftAmountTyForConstant() 459 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local 461 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP() 471 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local 474 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
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