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Searched refs:eaaddr (Results 1 – 25 of 25) sorted by relevance

/dports/emulators/pcem/pcem_emulator-pcem-faf5d6423060/src/
H A Dx87_ops_misc.h93 cpu_state.eaaddr += 14; in FSTOR()
102 cpu_state.eaaddr += 28; in FSTOR()
105 x87_ld_frstor(0); cpu_state.eaaddr += 10; in FSTOR()
106 x87_ld_frstor(1); cpu_state.eaaddr += 10; in FSTOR()
107 x87_ld_frstor(2); cpu_state.eaaddr += 10; in FSTOR()
108 x87_ld_frstor(3); cpu_state.eaaddr += 10; in FSTOR()
109 x87_ld_frstor(4); cpu_state.eaaddr += 10; in FSTOR()
155 cpu_state.eaaddr+=14; in FSAVE()
187 cpu_state.eaaddr+=14; in FSAVE()
218 cpu_state.eaaddr+=28; in FSAVE()
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H A Dx87_ops_loadstore.h6 if (fplog) pclog("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr); in opFILDiw_a16()
18 if (fplog) pclog("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr); in opFILDiw_a32()
31 if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr); in opFISTiw_a16()
44 if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr); in opFISTiw_a32()
58 if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr); in opFISTPiw_a16()
89 … %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4… in opFILDiq_a16()
104 … %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4… in opFILDiq_a32()
131 writememb(easeg, cpu_state.eaaddr + c, tempc); in FBSTP_a16()
157 writememb(easeg, cpu_state.eaaddr + c, tempc); in FBSTP_a32()
377 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); in opFSTPd_a16()
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H A Dx86_ops_mmx_mov.h16 dst = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; in opMOVD_l_mm_a16()
39 dst = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; in opMOVD_l_mm_a32()
60 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); in opMOVD_mm_l_a16()
61 … writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); if (cpu_state.abrt) return 1; in opMOVD_mm_l_a16()
78 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); in opMOVD_mm_l_a32()
79 … writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); if (cpu_state.abrt) return 1; in opMOVD_mm_l_a32()
99 dst = readmemq(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; in opMOVQ_q_mm_a16()
119 dst = readmemq(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; in opMOVQ_q_mm_a32()
138 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); in opMOVQ_mm_q_a16()
139 … writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q); if (cpu_state.abrt) return 1; in opMOVQ_mm_q_a16()
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H A Dx86_ops_mov_seg.h223 addr = readmemw(easeg, cpu_state.eaaddr); in opLDS_w_a16()
224 seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in opLDS_w_a16()
238 addr = readmemw(easeg, cpu_state.eaaddr); in opLDS_w_a32()
239 seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in opLDS_w_a32()
254 addr = readmeml(easeg, cpu_state.eaaddr); in opLDS_l_a16()
255 seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1; in opLDS_l_a16()
270 addr = readmeml(easeg, cpu_state.eaaddr); in opLDS_l_a32()
286 addr = readmemw(easeg, cpu_state.eaaddr); in opLSS_w_a16()
301 addr = readmemw(easeg, cpu_state.eaaddr); in opLSS_w_a32()
317 addr = readmeml(easeg, cpu_state.eaaddr); in opLSS_l_a16()
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H A Dx86_ops_mov.h186 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); in opMOV_b_imm_a16()
437 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); in opMOV_b_r_a16()
455 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); in opMOV_b_r_a32()
473 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); in opMOV_w_r_a16()
491 CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); in opMOV_w_r_a32()
547 CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); in opMOV_r_b_a16()
567 CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); in opMOV_r_b_a32()
587 CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); in opMOV_r_w_a16()
607 CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+1); in opMOV_r_w_a32()
627 CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr+3); in opMOV_r_l_a16()
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H A D386.c73 cpu_state.eaaddr = cpu_state.regs[sib & 7].l; in fetch_ea_32_long()
88 cpu_state.eaaddr = getlong(); in fetch_ea_32_long()
100 cpu_state.eaaddr = cpu_state.regs[cpu_rm].l; in fetch_ea_32_long()
116 cpu_state.eaaddr += getlong(); in fetch_ea_32_long()
121 cpu_state.eaaddr = getlong(); in fetch_ea_32_long()
126 uint32_t addr = easeg + cpu_state.eaaddr; in fetch_ea_32_long()
141 cpu_state.eaaddr = getword(); in fetch_ea_16_long()
148 cpu_state.eaaddr = 0; in fetch_ea_16_long()
154 cpu_state.eaaddr = getword(); in fetch_ea_16_long()
164 cpu_state.eaaddr &= 0xFFFF; in fetch_ea_16_long()
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H A D386_common.h159 return readmemb(easeg, cpu_state.eaaddr); in geteab()
169 return readmemw(easeg, cpu_state.eaaddr); in geteaw()
179 return readmeml(easeg, cpu_state.eaaddr); in geteal()
184 return readmemq(easeg, cpu_state.eaaddr); in geteaq()
190 return readmemb(easeg,cpu_state.eaaddr); in geteab_mem()
195 return readmemw(easeg,cpu_state.eaaddr); in geteaw_mem()
200 return readmeml(easeg,cpu_state.eaaddr); in geteal_mem()
205 writememql(easeg, cpu_state.eaaddr, v); in seteaq()
212 #define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,cpu_state.eaaddr,v);
213 #define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,cpu_state.eaaddr,v);
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H A Dx86_ops_call.h131 new_pc = readmemw(easeg, cpu_state.eaaddr); in opFF_w_a16()
132 new_cs = readmemw(easeg, (cpu_state.eaaddr + 2)); if (cpu_state.abrt) return 1; in opFF_w_a16()
150 new_pc = readmemw(easeg, cpu_state.eaaddr); in opFF_w_a16()
151 new_cs = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in opFF_w_a16()
208 new_pc = readmemw(easeg, cpu_state.eaaddr); in opFF_w_a32()
227 new_pc = readmemw(easeg, cpu_state.eaaddr); in opFF_w_a32()
228 new_cs = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in opFF_w_a32()
286 new_pc = readmeml(easeg, cpu_state.eaaddr); in opFF_l_a16()
305 new_pc = readmeml(easeg, cpu_state.eaaddr); in opFF_l_a16()
363 new_pc = readmeml(easeg, cpu_state.eaaddr); in opFF_l_a32()
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H A D386_dynarec.c81 cpu_state.eaaddr = cpu_state.regs[sib & 7].l; in fetch_ea_32_long()
96 cpu_state.eaaddr = getlong(); in fetch_ea_32_long()
108 cpu_state.eaaddr = cpu_state.regs[cpu_rm].l; in fetch_ea_32_long()
124 cpu_state.eaaddr += getlong(); in fetch_ea_32_long()
129 cpu_state.eaaddr = getlong(); in fetch_ea_32_long()
134 uint32_t addr = easeg + cpu_state.eaaddr; in fetch_ea_32_long()
149 cpu_state.eaaddr = getword(); in fetch_ea_16_long()
156 cpu_state.eaaddr = 0; in fetch_ea_16_long()
162 cpu_state.eaaddr = getword(); in fetch_ea_16_long()
172 cpu_state.eaaddr &= 0xFFFF; in fetch_ea_16_long()
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H A D386_dynarec_ops.c26 if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) in fetch_ea_32_long()
28 uint32_t addr = easeg + cpu_state.eaaddr; in fetch_ea_32_long()
41 if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) in fetch_ea_16_long()
43 uint32_t addr = easeg + cpu_state.eaaddr; in fetch_ea_16_long()
H A Dx86_ops_bit.h6 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; in opBT_w_r_a16()
21 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0; in opBT_w_r_a32()
36 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; in opBT_l_r_a16()
51 cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0; in opBT_l_r_a32()
69 … cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \
88 … cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \
107 … cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \
126 … cpu_state.eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \
H A Dx86_ops_atomic.h123 temp_hi = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; in opCMPXCHG8B_a16()
127 writememl(easeg, cpu_state.eaaddr+4, ECX); in opCMPXCHG8B_a16()
154 temp_hi = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; in opCMPXCHG8B_a32()
158 writememl(easeg, cpu_state.eaaddr+4, ECX); in opCMPXCHG8B_a32()
H A Dx86_ops_pmode.h307 writememl(easeg, cpu_state.eaaddr + 2, base); in op0F01_common()
316 writememl(easeg, cpu_state.eaaddr + 2, base); in op0F01_common()
329 … base = readmeml(0, easeg + cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in op0F01_common()
346 … base = readmeml(0, easeg + cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in op0F01_common()
394 mmu_invalidate(ds + cpu_state.eaaddr); in op0F01_common()
H A D808x.c373 cpu_state.eaaddr=0; in fetcheal()
378 cpu_state.eaaddr=(uint16_t)(int8_t)FETCH(); in fetcheal()
383 cpu_state.eaaddr=getword(); in fetcheal()
390 cpu_state.eaaddr&=0xFFFF; in fetcheal()
398 return readmemb(easeg+cpu_state.eaaddr); in geteab()
406 return readmemw(easeg,cpu_state.eaaddr); in geteaw()
414 return readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); in geteaw2()
428 writememb(easeg+cpu_state.eaaddr,val); in seteab()
438 writememw(easeg,cpu_state.eaaddr,val); in seteaw()
2089 cpu_state.regs[cpu_reg].w=cpu_state.eaaddr; in execx86()
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H A Dx86_ops_mmx_arith.h297 src.l[0] = readmeml(easeg, cpu_state.eaaddr); in opPMULLW_a16()
298 src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; in opPMULLW_a16()
324 src.l[0] = readmeml(easeg, cpu_state.eaaddr); in opPMULLW_a32()
325 src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; in opPMULLW_a32()
352 src.l[0] = readmeml(easeg, cpu_state.eaaddr); in opPMULHW_a16()
353 src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; in opPMULHW_a16()
379 src.l[0] = readmeml(easeg, cpu_state.eaaddr); in opPMULHW_a32()
380 src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 0; in opPMULHW_a32()
H A Dx86_ops_mmx.h14 … src.q = readmemq(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 1; \
H A Dcodegen_x86-64.c609 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_16_long()
719 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_16_long()
874 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_32_long()
885 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_32_long()
916 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_32_long()
923 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_32_long()
H A Dx86_ops_misc.h57 CHECK_READ(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr); in opF6_a16()
629 high = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in opBOUND_w_a16()
648 high = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; in opBOUND_w_a32()
668 high = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1; in opBOUND_l_a16()
687 high = readmeml(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1; in opBOUND_l_a32()
H A Dx87_ops.h107 test.eind.ll = readmeml(easeg,cpu_state.eaaddr); in x87_ld80()
109 test.begin = readmemw(easeg,cpu_state.eaaddr+8); in x87_ld80()
163 writememl(easeg,cpu_state.eaaddr,test.eind.ll); in x87_st80()
164 writememl(easeg,cpu_state.eaaddr+4,test.eind.ll>>32); in x87_st80()
165 writememw(easeg,cpu_state.eaaddr+8,test.begin); in x87_st80()
176 writememw(easeg, cpu_state.eaaddr + 8, 0x5555); in x87_st_fsave()
200 r->l[0] = readmeml(easeg, cpu_state.eaaddr); in x87_ldmmx()
202 *w4 = readmemw(easeg, cpu_state.eaaddr + 8); in x87_ldmmx()
207 writememl(easeg, cpu_state.eaaddr, r.l[0]); in x87_stmmx()
208 writememl(easeg, cpu_state.eaaddr + 4, r.l[1]); in x87_stmmx()
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H A Dcodegen_x86.c1688 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_16_long()
1729 addlong((uint32_t)&cpu_state.eaaddr); in codegen_generate_ea_16_long()
1816 addlong((uint32_t)&cpu_state.eaaddr); in codegen_generate_ea_32_long()
1825 addbyte((uint8_t)cpu_state_offset(eaaddr)); in codegen_generate_ea_32_long()
1835 cpu_state.eaaddr = cpu_state.regs[cpu_rm].l; in codegen_generate_ea_32_long()
1855 addlong((uint32_t)&cpu_state.eaaddr); in codegen_generate_ea_32_long()
H A Dx86_ops_mmx_pack.h15 src = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 0; in opPUNPCKLDQ_a16()
36 src = readmeml(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 0; in opPUNPCKLDQ_a32()
H A Dx86_ops_mmx_shift.h9 shift = readmemb(easeg, cpu_state.eaaddr); if (cpu_state.abrt) return 0; \
H A Dx87_ops_arith.h186 if (fplog) pclog("FUCOMPP\n", easeg, cpu_state.eaaddr); in opFUCOMPP()
H A Dibm.h142 uint32_t eaaddr; member
H A Dcodegen_ops_x86.h1200 cpu_state.eaaddr = cpu_state.regs[rm].l; in FETCH_EA_32()