Home
last modified time | relevance | path

Searched refs:v_max_u16_dpp (Results 1 – 25 of 84) sorted by relevance

1234

/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s11793 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
11805 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
11808 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
11811 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
11814 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
11817 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
11820 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
11823 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
11829 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
11844 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s13323 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
13335 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
13338 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
13341 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
13344 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
13347 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
13350 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
13353 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
13359 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
13374 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s1050 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
H A Dgfx7_unsupported.s1978 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s11793 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
11805 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
11808 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
11811 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
11814 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
11817 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
11820 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
11823 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
11829 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
11844 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s13317 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
13329 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
13332 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
13335 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
13338 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
13341 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
13344 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
13347 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
13353 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
13368 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s1049 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
H A Dgfx7_unsupported.s1978 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s11793 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
11805 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
11808 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
11811 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
11814 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
11817 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
11820 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
11823 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
11829 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
11844 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s13317 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
13329 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
13332 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
13335 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
13338 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
13341 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
13344 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
13347 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
13353 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
13368 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s1050 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
H A Dgfx7_unsupported.s1978 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s11793 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
11805 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
11808 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
11811 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
11814 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
11817 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
11820 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
11823 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
11829 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
11844 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s13317 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
13329 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
13332 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
13335 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
13338 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
13341 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
13344 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
13347 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
13353 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
13368 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s1049 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s11793 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
11805 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
11808 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
11811 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
11814 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
11817 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
11820 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
11823 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
11829 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
11844 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s13317 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
13329 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
13332 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
13335 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
13338 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
13341 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
13344 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
13347 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
13353 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
13368 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s1050 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s11793 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
11805 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
11808 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
11811 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
11814 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
11817 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
11820 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
11823 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
11829 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
11844 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s13317 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
13329 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
13332 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
13335 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
13338 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
13341 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
13344 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
13347 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
13353 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
13368 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s1050 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx8_asm_vop2.s11793 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
11805 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
11808 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
11811 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
11814 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
11817 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
11820 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
11823 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
11829 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
11844 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx9_asm_vop2.s13317 v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
13329 v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
13332 v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 label
13335 v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 label
13338 v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 label
13341 v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 label
13344 v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 label
13347 v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 label
13353 v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 label
13368 v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0 label
[all …]
H A Dgfx10_unsupported.s1050 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/AMDGPU/
H A Dgfx10_unsupported.s1049 v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label

1234