| /dragonfly/tools/tools/ath/common/ |
| H A D | dumpregs_5210.c | 47 DEFBASICfmt(AR_CFG, "CFG", AR_CFG_BITS),
|
| H A D | dumpregs_5211.c | 45 DEFBASICfmt(AR_CFG, "CFG", AR_CFG_BITS),
|
| H A D | dumpregs_5212.c | 48 DEFBASICfmt(AR_CFG, "CFG",
|
| H A D | dumpregs_5416.c | 47 DEFBASIC(AR_CFG, "CFG"),
|
| /dragonfly/sys/dev/netif/ath/ath_hal/ar5210/ |
| H A D | ar5210_xmit.c | 412 v = OS_REG_READ(ah, AR_CFG); in ar5210NumTxPending()
442 if ((OS_REG_READ(ah, AR_CFG) & AR_CFG_TXCNT) == 0) in ar5210StopTxDma()
|
| H A D | ar5210reg.h | 38 #define AR_CFG 0x0014 /* Configuration and status register */ macro
|
| H A D | ar5210_reset.c | 605 OS_REG_WRITE(ah, AR_CFG, mask); in ar5210SetResetReg()
607 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5210SetResetReg()
|
| /dragonfly/sys/dev/netif/ath/ath_hal/ar5312/ |
| H A D | ar5312_reset.c | 753 OS_REG_WRITE(ah, AR_CFG, mask); in ar5312SetResetReg()
755 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5312SetResetReg()
|
| /dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300.h | 1184 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTB | AR_CFG_SWRB,0)
1186 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTB,0)
1189 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWRB,0)
1191 #define ar9300_init_cfg_reg(ah) OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD,0)
|
| H A D | ar9300_reset.c | 1349 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar9300_set_operating_mode()
1354 OS_REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar9300_set_operating_mode()
2810 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_MISSING_TX_INTR_FIX_ENABLE); in ar9300_override_ini()
5201 OS_REG_RMW(ah, AR_CFG, AR_CFG_SWTB | AR_CFG_SWRB, 0); in ar9300_reset()
|
| H A D | ar9300reg.h | 41 #define AR_CFG AR_MAC_DMA_OFFSET(MAC_DMA_CFG) macro
|
| /dragonfly/sys/dev/netif/ath/ath_hal/ar5211/ |
| H A D | ar5211_reset.c | 405 OS_REG_WRITE(ah, AR_CFG, in ar5211Reset()
406 OS_REG_READ(ah, AR_CFG) | AR_CFG_CLK_GATE_DIS); in ar5211Reset()
771 OS_REG_WRITE(ah, AR_CFG, mask); in ar5211SetResetReg()
773 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5211SetResetReg()
|
| H A D | ar5211reg.h | 34 #define AR_CFG 0x0014 /* configuration and status register */ macro
|
| /dragonfly/sys/dev/netif/ath/ath_hal/ar5416/ |
| H A D | ar5416_reset.c | 1419 mask = OS_REG_READ(ah, AR_CFG); in ar5416SetReset()
1426 OS_REG_WRITE(ah, AR_CFG, mask); in ar5416SetReset()
1428 "Setting CFG 0x%x\n", OS_REG_READ(ah, AR_CFG)); in ar5416SetReset()
1442 OS_REG_WRITE(ah, AR_CFG, mask); in ar5416SetReset()
1444 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5416SetReset()
|
| /dragonfly/sys/dev/netif/ath/ath_hal/ar5212/ |
| H A D | ar5212_reset.c | 812 OS_REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar5212SetOperatingMode()
817 OS_REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); in ar5212SetOperatingMode()
1288 OS_REG_WRITE(ah, AR_CFG, mask); in ar5212SetResetReg()
1290 OS_REG_WRITE(ah, AR_CFG, INIT_CONFIG_STATUS); in ar5212SetResetReg()
|
| H A D | ar5212reg.h | 29 #define AR_CFG 0x0014 /* MAC configuration and status register */ macro
|