| /dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_interrupts.c | 103 OS_REG_WRITE(ah, AR_ISR, AR_ISR_HP_RXOK); in ar9300_get_pending_interrupts()
107 OS_REG_WRITE(ah, AR_ISR, in ar9300_get_pending_interrupts()
112 OS_REG_WRITE(ah, AR_ISR, AR_ISR_TXOK); in ar9300_get_pending_interrupts()
134 isr = OS_REG_READ(ah, AR_ISR); in ar9300_get_pending_interrupts()
148 ah->ah_intrstate[0] = OS_REG_READ(ah, AR_ISR); in ar9300_get_pending_interrupts()
330 OS_REG_WRITE(ah, AR_ISR, isr); in ar9300_get_pending_interrupts()
333 (void) OS_REG_READ(ah, AR_ISR); in ar9300_get_pending_interrupts()
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| H A D | ar9300reg.h | 237 #define AR_ISR AR_MAC_DMA_OFFSET(MAC_DMA_ISR_P) macro
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| H A D | ar9300_reset.c | 4938 OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ in ar9300_reset()
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5416/ |
| H A D | ar5416_interrupts.c | 86 isr = OS_REG_READ(ah, AR_ISR); in ar5416GetPendingInterrupts()
90 isr = OS_REG_READ(ah, AR_ISR); in ar5416GetPendingInterrupts()
220 OS_REG_WRITE(ah, AR_ISR, isr); in ar5416GetPendingInterrupts()
222 OS_REG_READ(ah, AR_ISR); in ar5416GetPendingInterrupts()
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| H A D | ar5416_reset.c | 312 OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ in ar5416Reset()
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5210/ |
| H A D | ar5210_interrupts.c | 49 isr = OS_REG_READ(ah, AR_ISR); in ar5210GetPendingInterrupts()
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| H A D | ar5210reg.h | 39 #define AR_ISR 0x001c /* Interrupt status register */ macro
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| H A D | ar5210_reset.c | 170 (void) OS_REG_READ(ah, AR_ISR); /* cleared on read */ in ar5210Reset()
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| /dragonfly/tools/tools/ath/common/ |
| H A D | dumpregs_5210.c | 49 DEFVOIDfmt(AR_ISR, "ISR", AR_ISR_BITS),
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| H A D | dumpregs_5211.c | 61 DEFINT(AR_ISR, "ISR"),
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| H A D | dumpregs_5212.c | 64 DEFINTfmt(AR_ISR, "ISR",
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| H A D | dumpregs_5416.c | 67 DEFINTfmt(AR_ISR, "ISR",
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5212/ |
| H A D | ar5212_interrupts.c | 61 isr = OS_REG_READ(ah, AR_ISR); in ar5212GetPendingInterrupts()
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| H A D | ar5212reg.h | 46 #define AR_ISR 0x0080 /* MAC Primary interrupt status register */ macro
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| H A D | ar5212_reset.c | 455 OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ in ar5212Reset()
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5211/ |
| H A D | ar5211reg.h | 49 #define AR_ISR 0x0080 /* Primary interrupt status register */ macro
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| H A D | ar5211_reset.c | 396 OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ in ar5211Reset()
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5312/ |
| H A D | ar5312_reset.c | 373 OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ in ar5312Reset()
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| /dragonfly/tools/tools/ath/athregs/ |
| H A D | dumpregs.c | 523 , OS_REG_READ(ah, AR_ISR) in ath_hal_dumpint()
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