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Searched refs:CACHE_FIFO_SIZE (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770d.h575 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
H A Dnid.h389 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
H A Drv770.c1457 sq_ms_fifo_sizes = (CACHE_FIFO_SIZE(16 * rdev->config.rv770.sq_num_cf_insts) | in rv770_gpu_init()
H A Devergreend.h1086 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
H A Dni.c1218 WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.cayman.sq_num_cf_insts) | in cayman_gpu_init()
H A Dr600d.h475 #define CACHE_FIFO_SIZE(x) ((x) << 0) macro
H A Dr600.c2180 tmp = (CACHE_FIFO_SIZE(0xa) | in r600_gpu_init()
H A Devergreen.c3546 WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.evergreen.sq_num_cf_insts) | in evergreen_gpu_init()