Searched refs:DPMTABLE_OD_UPDATE_SCLK (Results 1 – 12 of 12) sorted by relevance
188 #define DPMTABLE_OD_UPDATE_SCLK 0x00000001 macro
1497 (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) { in ci_unfreeze_sclk_mclk_dpm()1605 (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) { in ci_freeze_sclk_mclk_dpm()3908 pi->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; in ci_find_dpm_states_clocks_in_dpm_table()3941 if (pi->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) in ci_populate_and_upload_sclk_mclk_dpm_levels()3947 if (pi->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK)) { in ci_populate_and_upload_sclk_mclk_dpm_levels()
175 #define DPMTABLE_OD_UPDATE_SCLK 0x00000001 macro
907 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; in smu7_check_dpm_table_updated()934 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_SCLK; in smu7_check_dpm_table_updated()940 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK; in smu7_check_dpm_table_updated()1470 } else if (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in smu7_update_avfs()3612 data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; in smu7_find_dpm_states_clocks_in_dpm_table()3719 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { in smu7_freeze_sclk_mclk_dpm()3758 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()3773 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK)) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()3872 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) { in smu7_unfreeze_sclk_mclk_dpm()4221 *equal &= !(data->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK | in smu7_check_states_equal()
1540 if (data->need_update_dpm_table & DPMTABLE_OD_UPDATE_SCLK) in vega10_populate_single_gfx_level()2443 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_SCLK; in vega10_check_dpm_table_updated()2450 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK; in vega10_check_dpm_table_updated()2480 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK; in vega10_init_smc_table()3274 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()3286 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK + DPMTABLE_UPDATE_SOCCLK)) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()4832 data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; in vega10_odn_edit_dpm_table()
375 #define DPMTABLE_OD_UPDATE_SCLK 0x00000001 macro
2210 (DPMTABLE_OD_UPDATE_SCLK + in vegam_program_mem_timing_parameters()
2267 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in fiji_program_mem_timing_parameters()
2168 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in iceland_program_mem_timing_parameters()
1982 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in polaris10_program_mem_timing_parameters()
2202 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in ci_program_mem_timing_parameters()
2547 (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK)) in tonga_program_mem_timing_parameters()