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Searched refs:EFFECTIVE_L2_QUEUE_SIZE (Results 1 – 14 of 14) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770.c905 EFFECTIVE_L2_QUEUE_SIZE(7)); in rv770_pcie_gart_enable()
951 EFFECTIVE_L2_QUEUE_SIZE(7)); in rv770_pcie_gart_disable()
982 EFFECTIVE_L2_QUEUE_SIZE(7)); in rv770_agp_enable()
H A Drv770d.h646 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) macro
H A Dni.c1307 EFFECTIVE_L2_QUEUE_SIZE(7) | in cayman_pcie_gart_enable()
1386 EFFECTIVE_L2_QUEUE_SIZE(7) | in cayman_pcie_gart_disable()
H A Dnid.h109 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) macro
H A Dsid.h376 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) macro
H A Dcikd.h494 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) macro
H A Dr600.c1135 EFFECTIVE_L2_QUEUE_SIZE(7)); in r600_pcie_gart_enable()
1188 EFFECTIVE_L2_QUEUE_SIZE(7)); in r600_pcie_gart_disable()
1227 EFFECTIVE_L2_QUEUE_SIZE(7)); in r600_agp_enable()
H A Devergreen.c2394 EFFECTIVE_L2_QUEUE_SIZE(7)); in evergreen_pcie_gart_enable()
2447 EFFECTIVE_L2_QUEUE_SIZE(7)); in evergreen_pcie_gart_disable()
2477 EFFECTIVE_L2_QUEUE_SIZE(7)); in evergreen_agp_enable()
H A Devergreend.h1154 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) macro
H A Dr600d.h591 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 13) macro
H A Dsi.c4295 EFFECTIVE_L2_QUEUE_SIZE(7) | in si_pcie_gart_enable()
4381 EFFECTIVE_L2_QUEUE_SIZE(7) | in si_pcie_gart_disable()
H A Dcik.c5478 EFFECTIVE_L2_QUEUE_SIZE(7) | in cik_pcie_gart_enable()
5595 EFFECTIVE_L2_QUEUE_SIZE(7) | in cik_pcie_gart_disable()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgmc_v7_0.c628 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, EFFECTIVE_L2_QUEUE_SIZE, 7); in gmc_v7_0_gart_enable()
H A Dgmc_v8_0.c855 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, EFFECTIVE_L2_QUEUE_SIZE, 7); in gmc_v8_0_gart_enable()