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Searched refs:IS_BROADWELL (Results 1 – 22 of 22) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_gvt.c44 if (IS_BROADWELL(dev_priv)) in is_supported_device()
H A Di915_drv.c140 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_virt_detect_pch()
211 !IS_BROADWELL(dev_priv)); in intel_detect_pch()
218 !IS_BROADWELL(dev_priv)); in intel_detect_pch()
226 !IS_BROADWELL(dev_priv)); in intel_detect_pch()
234 !IS_BROADWELL(dev_priv)); in intel_detect_pch()
1682 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
1893 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
2609 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
2638 if (IS_BROADWELL(dev_priv)) {
2694 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
H A Dintel_fbc.c346 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in gen7_fbc_activate()
543 if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv)) in find_compression_threshold()
748 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_fbc_update_state_cache()
831 if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && in intel_fbc_can_activate()
1322 if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) in intel_sanitize_fbc_option()
H A Dintel_cdclk.c1766 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pixel_rate_to_cdclk()
1786 if (IS_BROADWELL(dev_priv) && crtc_state->ips_enabled) in intel_crtc_compute_min_cdclk()
1801 } else if (IS_GEN9(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_crtc_compute_min_cdclk()
2028 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_compute_max_dotclk()
2076 } else if (IS_BROADWELL(dev_priv)) { in intel_update_max_cdclk()
2235 } else if (IS_BROADWELL(dev_priv)) { in intel_init_cdclk_hooks()
2259 else if (IS_BROADWELL(dev_priv)) in intel_init_cdclk_hooks()
H A Dintel_i2c.c88 else if (IS_BROADWELL(dev_priv)) in get_gmbus_pin()
105 else if (IS_BROADWELL(dev_priv)) in intel_gmbus_is_valid_pin()
H A Dintel_ddi.c613 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_dp()
634 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_edp()
649 if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_fdi()
667 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_get_buf_trans_hdmi()
786 } else if (IS_BROADWELL(dev_priv)) { in intel_ddi_hdmi_level()
H A Dintel_device_info.c443 else if (IS_BROADWELL(dev_priv)) in intel_device_info_runtime_init()
H A Di915_drv.h2997 #define IS_BROADWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROADWELL) macro
3007 #define IS_BDW_ULT(dev_priv) (IS_BROADWELL(dev_priv) && \
3012 #define IS_BDW_ULX(dev_priv) (IS_BROADWELL(dev_priv) && \
3014 #define IS_BDW_GT3(dev_priv) (IS_BROADWELL(dev_priv) && \
3138 IS_BROADWELL(dev_priv)) && HAS_EDRAM(dev_priv))
3188 #define HAS_IPS(dev_priv) (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
H A Dintel_pm.c2908 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_max_level()
3082 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_compute_pipe_wm()
3273 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_lp_latency()
3497 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ilk_write_wm_values()
5318 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_pipe_wm_get_hw_state()
5786 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_get_hw_state()
6536 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv) || in gen6_init_rps_frequencies()
7929 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_init_gt_powersave()
8084 else if (IS_BROADWELL(dev_priv)) in intel_enable_rc6()
8107 } else if (IS_BROADWELL(dev_priv)) { in intel_enable_rps()
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H A Dintel_sprite.c564 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ivb_sprite_ctl()
651 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ivb_update_plane()
H A Di915_sysfs.c258 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
H A Dintel_uncore.c328 IS_BROADWELL(dev_priv) || in intel_uncore_edram_detect()
1168 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_uncore_fw_domains_init()
H A Dintel_color.c656 } else if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv) || in intel_color_init()
H A Dintel_psr.c934 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_psr_init()
H A Dintel_display.c3161 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in i9xx_plane_ctl()
3224 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()
3287 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_update_primary_plane()
4835 if (IS_BROADWELL(dev_priv)) { in hsw_enable_ips()
4869 if (IS_BROADWELL(dev_priv)) { in hsw_disable_ips()
6080 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ironlake_check_fdi_lanes()
8560 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ironlake_get_initial_plane_config()
9194 if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) { in haswell_get_pipe_config()
14204 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_init_display_hooks()
15398 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_display_capture_error_state()
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H A Dintel_dp.c246 IS_BROADWELL(dev_priv)) { in intel_dp_set_source_rates()
1013 if (IS_BROADWELL(dev_priv)) in g4x_get_aux_send_ctl()
3193 } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_dp_pre_emphasis_max()
6031 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_dp_init_connector()
H A Di915_irq.c2590 } else if (IS_BROADWELL(dev_priv)) { in gen8_de_irq_handler()
3616 else if (IS_BROADWELL(dev_priv)) in gen8_de_irq_postinstall()
3634 else if (IS_BROADWELL(dev_priv)) in gen8_de_irq_postinstall()
H A Dintel_engine_cs.c1449 if (IS_BROADWELL(dev_priv)) in init_workarounds_ring()
H A Di915_perf.c2741 } else if (IS_BROADWELL(dev_priv)) { in i915_perf_register()
H A Dintel_lrc.c1257 if (IS_BROADWELL(engine->i915)) in gen8_init_indirectctx_bb()
H A Dintel_runtime_pm.c2502 } else if (IS_BROADWELL(dev_priv)) { in intel_power_domains_init()
H A Di915_gem_gtt.c2123 if (IS_BROADWELL(dev_priv)) in gtt_write_workarounds()