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Searched refs:MM_CFGREGS_CNTL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770.c2071 WREG32(MM_CFGREGS_CNTL, MM_WR_TO_CFG_EN); in rv770_pcie_gen2_enable()
2076 WREG32(MM_CFGREGS_CNTL, 0); in rv770_pcie_gen2_enable()
H A Drv770d.h976 #define MM_CFGREGS_CNTL 0x544c macro
H A Dnid.h1125 #define MM_CFGREGS_CNTL 0x544c macro
H A Dr600.c4572 WREG32(MM_CFGREGS_CNTL, 0x8); in r600_pcie_gen2_enable()
4574 WREG32(MM_CFGREGS_CNTL, 0); in r600_pcie_gen2_enable()
4589 WREG32(MM_CFGREGS_CNTL, MM_WR_TO_CFG_EN); in r600_pcie_gen2_enable()
4594 WREG32(MM_CFGREGS_CNTL, 0); in r600_pcie_gen2_enable()
H A Devergreend.h1513 #define MM_CFGREGS_CNTL 0x544c macro
H A Dr600d.h924 #define MM_CFGREGS_CNTL 0x544c macro