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Searched refs:PACKET3_SET_SH_REG (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsoc15d.h269 #define PACKET3_SET_SH_REG 0x76 macro
H A Dvid.h348 #define PACKET3_SET_SH_REG 0x76 macro
H A Dcikd.h466 #define PACKET3_SET_SH_REG 0x76 macro
H A Dgfx_v8_0.c1674 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1680 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1700 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1706 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1726 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1732 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
/dragonfly/sys/dev/drm/radeon/
H A Dsid.h1790 #define PACKET3_SET_SH_REG 0x76 macro
H A Dcikd.h1932 #define PACKET3_SET_SH_REG 0x76 macro
H A Dsi.c4564 case PACKET3_SET_SH_REG: in si_vm_packet3_gfx_check()
4667 case PACKET3_SET_SH_REG: in si_vm_packet3_compute_check()