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Searched refs:UVD_CGC_GATE__SYS_MASK (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Duvd_v6_0.c637 data |= UVD_CGC_GATE__SYS_MASK |
669 data &= ~(UVD_CGC_GATE__SYS_MASK |
1285 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v6_0_enable_clock_gating()
1374 cgc_flags = UVD_CGC_GATE__SYS_MASK |
H A Duvd_v5_0.c625 data3 |= (UVD_CGC_GATE__SYS_MASK | in uvd_v5_0_enable_clock_gating()
712 cgc_flags = UVD_CGC_GATE__SYS_MASK |
H A Dvcn_v1_0.c363 data &= ~(UVD_CGC_GATE__SYS_MASK in vcn_v1_0_disable_clock_gating()
H A Duvd_v7_0.c1646 cgc_flags = UVD_CGC_GATE__SYS_MASK |
/dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h397 #define UVD_CGC_GATE__SYS_MASK macro
H A Duvd_4_0_sh_mask.h100 #define UVD_CGC_GATE__SYS_MASK 0x00000001L macro
H A Duvd_4_2_sh_mask.h123 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
H A Duvd_5_0_sh_mask.h135 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h137 #define UVD_CGC_GATE__SYS_MASK 0x1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h800 #define UVD_CGC_GATE__SYS_MASK macro