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Searched refs:UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h520 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK … macro
H A Duvd_4_0_sh_mask.h348 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x00000100L macro
H A Duvd_4_2_sh_mask.h351 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x100 macro
H A Duvd_5_0_sh_mask.h383 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x100 macro
H A Duvd_6_0_sh_mask.h385 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK 0x100 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1012 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Duvd_v7_0.c872 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK | in uvd_v7_0_sriov_start()
987 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK | in uvd_v7_0_start()
H A Duvd_v6_0.c757 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK | in uvd_v6_0_start()
H A Dvcn_v1_0.c659 UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK | in vcn_v1_0_start()