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Searched refs:UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h538 #define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT … macro
H A Duvd_4_0_sh_mask.h419 #define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT 0x00000008 macro
H A Duvd_4_2_sh_mask.h418 #define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT 0x8 macro
H A Duvd_5_0_sh_mask.h450 #define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT 0x8 macro
H A Duvd_6_0_sh_mask.h452 #define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT 0x8 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1030 #define UVD_LMI_SWAP_CNTL__VCPU_W_MC_SWAP__SHIFT … macro