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Searched refs:UVD_SEMA_CNTL__SEMAPHORE_EN__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h340 #define UVD_SEMA_CNTL__SEMAPHORE_EN__SHIFT macro
H A Duvd_4_0_sh_mask.h629 #define UVD_SEMA_CNTL__SEMAPHORE_EN__SHIFT 0x00000000 macro
H A Duvd_4_2_sh_mask.h110 #define UVD_SEMA_CNTL__SEMAPHORE_EN__SHIFT 0x0 macro
H A Duvd_5_0_sh_mask.h122 #define UVD_SEMA_CNTL__SEMAPHORE_EN__SHIFT 0x0 macro
H A Duvd_6_0_sh_mask.h124 #define UVD_SEMA_CNTL__SEMAPHORE_EN__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h676 #define UVD_SEMA_CNTL__SEMAPHORE_EN__SHIFT macro