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Searched refs:UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h659 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2_MASK … macro
H A Duvd_4_0_sh_mask.h752 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2_MASK 0x01ffffffL macro
H A Duvd_4_2_sh_mask.h531 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2_MASK 0x1ffffff macro
H A Duvd_5_0_sh_mask.h563 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2_MASK 0x1ffffff macro
H A Duvd_6_0_sh_mask.h565 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2_MASK 0x1ffffff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1133 #define UVD_VCPU_CACHE_OFFSET2__CACHE_OFFSET2_MASK … macro