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Searched refs:VC_AND_TC (Results 1 – 16 of 16) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770d.h617 #define VC_AND_TC 2 macro
H A Dnid.h334 #define VC_AND_TC 2 macro
H A Dsid.h1054 #define VC_AND_TC 2 macro
H A Dcikd.h1129 #define VC_AND_TC 2 macro
H A Drv770.c1537 WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(VC_AND_TC) | in rv770_gpu_init()
H A Devergreend.h1123 #define VC_AND_TC 2 macro
H A Dni.c1234 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) | in cayman_gpu_init()
H A Dr600d.h534 #define VC_AND_TC 2 macro
H A Dr600.c2284 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); in r600_gpu_init()
H A Devergreen.c3636 vgt_cache_invalidation = CACHE_INVALIDATION(VC_AND_TC); in evergreen_gpu_init()
H A Dsi.c3318 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) | in si_gpu_init()
H A Dcik.c3429 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) | in cik_gpu_init()
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_enum.h4917 VC_AND_TC = 0x2, enumerator
H A Dgfx_8_0_enum.h5403 VC_AND_TC = 0x2, enumerator
H A Dgfx_8_1_enum.h5472 VC_AND_TC = 0x2, enumerator
/dragonfly/sys/dev/drm/amd/include/
H A Dvega10_enum.h15652 VC_AND_TC = 0x00000002, enumerator