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Searched refs:gtt_start (Results 1 – 19 of 19) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dradeon_test.c86 void **gtt_start, **gtt_end; in radeon_do_test_moves() local
113 gtt_start < gtt_end; in radeon_do_test_moves()
114 gtt_start++) in radeon_do_test_moves()
115 *gtt_start = gtt_start; in radeon_do_test_moves()
150 gtt_start++, vram_start++) { in radeon_do_test_moves()
151 if (*vram_start != gtt_start) { in radeon_do_test_moves()
155 i, *vram_start, gtt_start, in radeon_do_test_moves()
200 gtt_start < gtt_end; in radeon_do_test_moves()
201 gtt_start++, vram_start++) { in radeon_do_test_moves()
202 if (*gtt_start != vram_start) { in radeon_do_test_moves()
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H A Dradeon_agp.c246 rdev->mc.gtt_start = rdev->mc.agp_base; in radeon_agp_init()
247 rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; in radeon_agp_init()
249 rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); in radeon_agp_init()
H A Drv770.c922 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); in rv770_pcie_gart_enable()
1028 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in rv770_mc_program()
1037 rdev->mc.gtt_start >> 12); in rv770_mc_program()
1056 WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16); in rv770_mc_program()
1610 size_bf = mc->gtt_start; in r700_vram_gtt_location()
1618 mc->vram_start = mc->gtt_start - mc->mc_vram_size; in r700_vram_gtt_location()
H A Dradeon_device.c598 if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_start <= mc->gtt_end) { in radeon_vram_location()
634 mc->gtt_start = (mc->vram_start & ~mc->gtt_base_align) - mc->gtt_size; in radeon_gtt_location()
640 mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align; in radeon_gtt_location()
642 mc->gtt_end = mc->gtt_start + mc->gtt_size - 1; in radeon_gtt_location()
644 mc->gtt_size >> 20, mc->gtt_start, mc->gtt_end); in radeon_gtt_location()
H A Dr520.c153 S_000005_MC_AGP_START(rdev->mc.gtt_start >> 16) | in r520_mc_program()
H A Dradeon_ttm.c143 man->gpu_offset = rdev->mc.gtt_start; in radeon_init_mem_type()
277 old_start += rdev->mc.gtt_start; in radeon_move_blit()
288 new_start += rdev->mc.gtt_start; in radeon_move_blit()
H A Drs400.c148 tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16); in rs400_gart_enable()
H A Dr600.c1085 WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12); in r600_pcie_gart_tlb_flush()
1159 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); in r600_pcie_gart_enable()
1317 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in r600_mc_program()
1326 rdev->mc.gtt_start >> 12); in r600_mc_program()
1343 WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 22); in r600_mc_program()
1391 size_bf = mc->gtt_start; in r600_vram_gtt_location()
1399 mc->vram_start = mc->gtt_start - mc->mc_vram_size; in r600_vram_gtt_location()
H A Dr300.c159 WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_start); in rv370_pcie_gart_enable()
1334 S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) | in r300_mc_program()
H A Dradeon_object.c346 domain_start = bo->rdev->mc.gtt_start; in radeon_bo_pin_restricted()
H A Drs600.c593 WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start); in rs600_gart_enable()
H A Devergreen.c2420 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); in evergreen_pcie_gart_enable()
2856 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in evergreen_mc_program()
2865 rdev->mc.gtt_start >> 12); in evergreen_mc_program()
2893 WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16); in evergreen_mc_program()
H A Drv515.c484 S_000002_MC_AGP_START(rdev->mc.gtt_start >> 16) | in rv515_mc_program()
H A Dni.c1314 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); in cayman_pcie_gart_enable()
H A Dr100.c662 WREG32(RADEON_AIC_LO_ADDR, rdev->mc.gtt_start); in r100_pci_gart_enable()
3864 S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) | in r100_mc_program()
H A Dradeon.h695 u64 gtt_start; member
H A Dsi.c4302 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); in si_pcie_gart_enable()
H A Dcik.c5485 WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12); in cik_pcie_gart_enable()
/dragonfly/sys/dev/drm/include/uapi/drm/
H A Di915_drm.h529 __u64 gtt_start; member