/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | amdgpu_pll.c | 272 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_use_mask() 273 pll_in_use |= (1 << test_amdgpu_crtc->pll_id); in amdgpu_pll_get_use_mask() 300 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_dp_ppll() 301 return test_amdgpu_crtc->pll_id; in amdgpu_pll_get_shared_dp_ppll() 338 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_nondp_ppll() 339 return test_amdgpu_crtc->pll_id; in amdgpu_pll_get_shared_nondp_ppll() 346 (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID)) in amdgpu_pll_get_shared_nondp_ppll() 347 return test_amdgpu_crtc->pll_id; in amdgpu_pll_get_shared_nondp_ppll()
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H A D | atombios_crtc.c | 243 int pll_id, in amdgpu_atombios_crtc_program_ss() argument 266 pll_id == adev->mode_info.crtcs[i]->pll_id) { in amdgpu_atombios_crtc_program_ss() 280 switch (pll_id) { in amdgpu_atombios_crtc_program_ss() 567 if (pll_id < ATOM_EXT_PLL1) in is_pixel_clock_source_from_pll() 578 int pll_id, in amdgpu_atombios_crtc_program_pll() argument 613 args.v1.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll() 623 args.v2.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll() 633 args.v3.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll() 672 args.v5.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll() 704 args.v6.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll() [all …]
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H A D | atombios_crtc.h | 44 int pll_id,
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H A D | dce_virtual.c | 184 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_disable() 249 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_init()
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H A D | dce_v11_0.c | 2625 amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { in dce_v11_0_crtc_disable() 2633 switch (amdgpu_crtc->pll_id) { in dce_v11_0_crtc_disable() 2638 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v11_0_crtc_disable() 2648 amdgpu_atombios_crtc_program_pll(crtc, ATOM_CRTC_INVALID, amdgpu_crtc->pll_id, in dce_v11_0_crtc_disable() 2655 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_disable() 2684 amdgpu_crtc->pll_id, in dce_v11_0_crtc_mode_set() 2728 amdgpu_crtc->pll_id = dce_v11_0_pick_pll(crtc); in dce_v11_0_crtc_mode_fixup() 2730 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v11_0_crtc_mode_fixup() 2803 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_init()
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H A D | atombios_encoders.c | 842 int pll_id = 0; in amdgpu_atombios_encoder_setup_dig_transmitter() local 873 pll_id = amdgpu_crtc->pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter() 1041 args.v3.acConfig.ucRefClkSource = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter() 1103 args.v4.acConfig.ucRefClkSource = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter() 1168 args.v5.asConfig.ucPhyClkSrcId = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
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H A D | dce_v10_0.c | 2546 amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { in dce_v10_0_crtc_disable() 2554 switch (amdgpu_crtc->pll_id) { in dce_v10_0_crtc_disable() 2559 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v10_0_crtc_disable() 2566 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_disable() 2620 amdgpu_crtc->pll_id = dce_v10_0_pick_pll(crtc); in dce_v10_0_crtc_mode_fixup() 2622 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v10_0_crtc_mode_fixup() 2695 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_init()
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H A D | amdgpu_mode.h | 410 u32 pll_id; member
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/dragonfly/sys/dev/drm/radeon/ |
H A D | atombios_crtc.c | 398 switch (pll_id) { in atombios_disable_ss() 414 switch (pll_id) { in atombios_disable_ss() 443 int pll_id, in atombios_crtc_program_ss() argument 466 pll_id == rdev->mode_info.crtcs[i]->pll_id) { in atombios_crtc_program_ss() 481 switch (pll_id) { in atombios_crtc_program_ss() 500 switch (pll_id) { in atombios_crtc_program_ss() 522 args.v1.ucPpll = pll_id; in atombios_crtc_program_ss() 822 int pll_id, in atombios_crtc_program_pll() argument 857 args.v1.ucPpll = pll_id; in atombios_crtc_program_pll() 867 args.v2.ucPpll = pll_id; in atombios_crtc_program_pll() [all …]
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H A D | atombios_encoders.c | 1080 int pll_id = 0; in atombios_dig_transmitter_setup2() local 1112 pll_id = radeon_crtc->pll_id; in atombios_dig_transmitter_setup2() 1280 args.v3.acConfig.ucRefClkSource = pll_id; in atombios_dig_transmitter_setup2() 1342 args.v4.acConfig.ucRefClkSource = pll_id; in atombios_dig_transmitter_setup2() 1407 args.v5.asConfig.ucPhyClkSrcId = pll_id; in atombios_dig_transmitter_setup2()
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H A D | radeon_mode.h | 353 int pll_id; member
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/dragonfly/sys/dev/drm/amd/display/dc/bios/ |
H A D | command_table.c | 524 uint32_t pll_id; in transmitter_control_v3() local 546 if (!cmd->clock_source_id_to_atom(cntl->pll_id, &pll_id)) in transmitter_control_v3() 1020 uint32_t pll_id; in set_pixel_clock_v5() local 1024 if (bp->cmd_helper->clock_source_id_to_atom(bp_params->pll_id, &pll_id) in set_pixel_clock_v5() 1077 uint32_t pll_id; in set_pixel_clock_v6() local 1081 if (bp->cmd_helper->clock_source_id_to_atom(bp_params->pll_id, &pll_id) in set_pixel_clock_v6() 1155 uint32_t pll_id; in set_pixel_clock_v7() local 1159 if (bp->cmd_helper->clock_source_id_to_atom(bp_params->pll_id, &pll_id) in set_pixel_clock_v7() 1181 clk.ucPpll = (uint8_t) pll_id; in set_pixel_clock_v7() 1366 switch (bp_params->pll_id) { in enable_spread_spectrum_on_ppll_v3() [all …]
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H A D | command_table2.c | 267 uint32_t pll_id; in set_pixel_clock_v7() local 271 if (bp->cmd_helper->clock_source_id_to_atom(bp_params->pll_id, &pll_id) in set_pixel_clock_v7() 294 clk.pll_id = (uint8_t) pll_id; in set_pixel_clock_v7() 721 if (!cmd->clock_source_id_to_atom(bp_params->pll_id, &atom_pll_id) || in set_dce_clock_v2_1()
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/dragonfly/sys/dev/drm/amd/display/include/ |
H A D | bios_parser_types.h | 143 enum clock_source_id pll_id; /* needed for DCE 4.0 */ member 209 enum clock_source_id pll_id; /* Clock Source Id */ member 255 enum clock_source_id pll_id; /* Clock Source Id */ member 282 enum clock_source_id pll_id; member
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/dragonfly/sys/dev/drm/i915/ |
H A D | intel_ddi.c | 1159 enum intel_dpll_id pll_id) in skl_calc_wrpll_link() argument 1165 cfgcr1_reg = DPLL_CFGCR1(pll_id); in skl_calc_wrpll_link() 1166 cfgcr2_reg = DPLL_CFGCR2(pll_id); in skl_calc_wrpll_link() 1219 enum intel_dpll_id pll_id) in cnl_calc_wrpll_link() argument 1224 cfgcr0 = I915_READ(CNL_DPLL_CFGCR0(pll_id)); in cnl_calc_wrpll_link() 1307 enum intel_dpll_id pll_id; in cnl_ddi_clock_get() local 1361 enum intel_dpll_id pll_id; in skl_ddi_clock_get() local 1452 enum intel_dpll_id pll_id) in bxt_calc_pll_link() argument 1459 if (WARN_ON(pll_id == DPLL_ID_PRIVATE)) in bxt_calc_pll_link() 1462 pll = &dev_priv->shared_dplls[pll_id]; in bxt_calc_pll_link() [all …]
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H A D | intel_dpll_mgr.c | 781 enum intel_dpll_id pll_id; in hsw_ddi_dp_get_dpll() local 785 pll_id = DPLL_ID_LCPLL_810; in hsw_ddi_dp_get_dpll() 788 pll_id = DPLL_ID_LCPLL_1350; in hsw_ddi_dp_get_dpll() 791 pll_id = DPLL_ID_LCPLL_2700; in hsw_ddi_dp_get_dpll() 798 pll = intel_get_shared_dpll_by_id(dev_priv, pll_id); in hsw_ddi_dp_get_dpll()
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H A D | intel_display.c | 8632 enum intel_dpll_id pll_id; in ironlake_get_pipe_config() local 8647 pll_id = (enum intel_dpll_id) crtc->pipe; in ironlake_get_pipe_config() 8651 pll_id = DPLL_ID_PCH_PLL_B; in ironlake_get_pipe_config() 8653 pll_id= DPLL_ID_PCH_PLL_A; in ironlake_get_pipe_config() 8657 intel_get_shared_dpll_by_id(dev_priv, pll_id); in ironlake_get_pipe_config()
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/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_clock_source.c | 698 bp_ss_params.pll_id = clk_src->base.id; in disable_spread_spectrum() 800 bp_params.pll_id = clk_src->base.id; in enable_spread_spectrum() 938 bp_pc_params.pll_id = clock_source->id; in dce110_program_pix_clk() 1027 bp_pixel_clock_params.pll_id = clk_src->id; in dce110_clock_source_power_down()
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H A D | dce_clocks.c | 256 pxl_clk_params.pll_id = CLOCK_SOURCE_ID_DFS; in dce_set_clock() 310 dce_clk_params.pll_id = CLOCK_SOURCE_ID_DFS; in dce112_set_clock() 327 (dce_clk_params.pll_id == in dce112_set_clock()
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H A D | dce_link_encoder.c | 937 cntl.pll_id = clock_source; in dce110_link_encoder_enable_tmds_output() 979 cntl.pll_id = clock_source; in dce110_link_encoder_enable_dp_output() 1018 cntl.pll_id = clock_source; in dce110_link_encoder_enable_dp_mst_output()
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/dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
H A D | dcn10_link_encoder.c | 886 cntl.pll_id = clock_source; in dcn10_link_encoder_enable_tmds_output() 928 cntl.pll_id = clock_source; in dcn10_link_encoder_enable_dp_output() 967 cntl.pll_id = clock_source; in dcn10_link_encoder_enable_dp_mst_output()
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/dragonfly/sys/dev/drm/amd/include/ |
H A D | atomfirmware.h | 2157 uint8_t pll_id; // ATOM_PHY_PLL0/ATOM_PHY_PLL1/ATOM_PPLL0 member
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