/dragonfly/sys/dev/drm/amd/display/dc/inc/ |
H A D | reg_helper.h | 56 REG(reg_name), \ 61 FD(reg_name##__##field) 163 FN(reg_name, f2), v2) 169 FN(reg_name, f3), v3) 176 FN(reg_name, f4), v4) 184 FN(reg_name, f5), v5) 193 FN(reg_name, f6), v6) 203 FN(reg_name, f7), v7) 214 FN(reg_name, f8), v8) 220 REG(reg_name), FN(reg_name, field), val,\ [all …]
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/dragonfly/sys/dev/drm/amd/display/dc/ |
H A D | dm_services.h | 120 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument 123 reg_name ## __ ## reg_field ## _MASK,\ 124 reg_name ## __ ## reg_field ## __SHIFT) 140 reg_name ## __ ## reg_field ## _MASK,\ 141 reg_name ## __ ## reg_field ## __SHIFT) 170 …generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name +… 171 …dm_read_reg_func(ctx, mm##reg_name + DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + inst_… 174 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ argument 175 …generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + … 181 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\ [all …]
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/dragonfly/sys/dev/drm/amd/display/dc/gpio/dce120/ |
H A D | hw_factory_dce120.c | 46 #define SF_HPD(reg_name, field_name, post_fix)\ argument 47 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 50 #define SF_HPD(reg_name, field_name, post_fix)\ argument 51 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 60 #define REG(reg_name)\ argument 61 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 63 #define REGI(reg_name, block, id)\ argument 64 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 65 mm ## block ## id ## _ ## reg_name 96 #define SF_DDC(reg_name, field_name, post_fix)\ argument [all …]
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H A D | hw_translate_dce120.c | 51 #define REG(reg_name)\ argument 52 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 54 #define REGI(reg_name, block, id)\ argument 55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 56 mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce120/ |
H A D | i2caux_dce120.c | 56 #define SR(reg_name)\ argument 57 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 58 mm ## reg_name 60 #define SRI(reg_name, block, id)\ argument 61 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 62 mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dcn10/ |
H A D | i2caux_dcn10.c | 56 #define SR(reg_name)\ argument 57 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 58 mm ## reg_name 60 #define SRI(reg_name, block, id)\ argument 61 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 62 mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/gpio/dcn10/ |
H A D | hw_factory_dcn10.c | 46 #define SF_HPD(reg_name, field_name, post_fix)\ argument 47 .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix 56 #define REG(reg_name)\ argument 57 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 59 #define REGI(reg_name, block, id)\ argument 60 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 61 mm ## block ## id ## _ ## reg_name 91 #define SF_DDC(reg_name, field_name, post_fix)\ argument 92 .field_name = reg_name ## __ ## field_name ## post_fix
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H A D | hw_translate_dcn10.c | 51 #define REG(reg_name)\ argument 52 BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name 54 #define REGI(reg_name, block, id)\ argument 55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 56 mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/gpio/dce110/ |
H A D | hw_factory_dce110.c | 36 #define SF_HPD(reg_name, field_name, post_fix)\ argument 37 .field_name = reg_name ## __ ## field_name ## post_fix 39 #define REG(reg_name)\ argument 40 mm ## reg_name 42 #define REGI(reg_name, block, id)\ argument 43 mm ## block ## id ## _ ## reg_name 77 #define SF_DDC(reg_name, field_name, post_fix)\ argument 78 .field_name = reg_name ## __ ## field_name ## post_fix
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/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce100/ |
H A D | i2caux_dce100.c | 45 #define SR(reg_name)\ argument 46 .reg_name = mm ## reg_name 49 #define SRI(reg_name, block, id)\ argument 50 .reg_name = mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce112/ |
H A D | i2caux_dce112.c | 46 #define SR(reg_name)\ argument 47 .reg_name = mm ## reg_name 50 #define SRI(reg_name, block, id)\ argument 51 .reg_name = mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce80/ |
H A D | i2caux_dce80.c | 62 #define SR(reg_name)\ argument 63 .reg_name = mm ## reg_name 66 #define SRI(reg_name, block, id)\ argument 67 .reg_name = mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce110/ |
H A D | i2caux_dce110.c | 158 #define SR(reg_name)\ argument 159 .reg_name = mm ## reg_name 162 #define SRI(reg_name, block, id)\ argument 163 .reg_name = mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
H A D | dcn10_link_encoder.c | 46 #define FN(reg_name, field_name) \ argument 1301 #define HPD_REG_READ(reg_name) \ argument 1306 HPD_REG(reg_name), \ 1307 HPD_REG_READ(reg_name), \ 1311 HPD_REG_UPDATE_N(reg_name, 1, \ 1312 FN(reg_name, field), val) 1334 #define AUX_REG_READ(reg_name) \ argument 1339 AUX_REG(reg_name), \ 1340 AUX_REG_READ(reg_name), \ 1344 AUX_REG_UPDATE_N(reg_name, 1, \ [all …]
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H A D | dcn10_resource.c | 167 #define SR(reg_name)\ argument 168 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 169 mm ## reg_name 172 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 177 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 187 #define NBIO_SR(reg_name)\ argument 188 .reg_name = NBIO_BASE(mm ## reg_name ## _BASE_IDX) + \ 189 mm ## reg_name 198 #define MMHUB_SR(reg_name)\ argument 199 .reg_name = MMHUB_BASE(mm ## reg_name ## _BASE_IDX) + \ [all …]
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/dragonfly/sys/dev/drm/amd/display/dc/gpio/dce80/ |
H A D | hw_factory_dce80.c | 39 #define REG(reg_name)\ argument 40 mm ## reg_name 81 #define SF_DDC(reg_name, field_name, post_fix)\ argument 82 .field_name = reg_name ## __ ## field_name ## post_fix
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/dragonfly/sys/dev/drm/amd/display/dc/dce120/ |
H A D | dce120_resource.c | 132 #define SR(reg_name)\ argument 133 .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ 134 mm ## reg_name 136 #define SRI(reg_name, block, id)\ argument 137 .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 138 mm ## block ## id ## _ ## reg_name 628 #define SRII(reg_name, block, id)\ argument 629 .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 630 mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/dce100/ |
H A D | dce100_resource.c | 133 #define SR(reg_name)\ argument 134 .reg_name = mm ## reg_name 137 #define SRI(reg_name, block, id)\ argument 138 .reg_name = mm ## block ## id ## _ ## reg_name 438 #define SRII(reg_name, block, id)\ argument 439 .reg_name[id] = mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_clocks.h | 39 #define CLK_SF(reg_name, field_name, post_fix)\ argument 40 .field_name = reg_name ## __ ## field_name ## post_fix
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H A D | dce_audio.h | 44 #define SF(reg_name, field_name, post_fix)\ argument 45 .field_name = reg_name ## __ ## field_name ## post_fix
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/dragonfly/sys/dev/drm/amd/display/dc/irq/dce120/ |
H A D | irq_service_dce120.c | 93 #define SRI(reg_name, block, id)\ argument 94 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 95 mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/irq/dcn10/ |
H A D | irq_service_dcn10.c | 163 #define SRI(reg_name, block, id)\ argument 164 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ 165 mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/dce110/ |
H A D | dce110_resource.c | 143 #define SR(reg_name)\ argument 144 .reg_name = mm ## reg_name 147 #define SRI(reg_name, block, id)\ argument 148 .reg_name = mm ## block ## id ## _ ## reg_name 450 #define SRII(reg_name, block, id)\ argument 451 .reg_name[id] = mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/dce112/ |
H A D | dce112_resource.c | 145 #define SR(reg_name)\ argument 146 .reg_name = mm ## reg_name 149 #define SRI(reg_name, block, id)\ argument 150 .reg_name = mm ## block ## id ## _ ## reg_name 459 #define SRII(reg_name, block, id)\ argument 460 .reg_name[id] = mm ## block ## id ## _ ## reg_name
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/dragonfly/sys/dev/drm/amd/display/dc/dce80/ |
H A D | dce80_resource.c | 151 #define SR(reg_name)\ argument 152 .reg_name = mm ## reg_name 155 #define SRI(reg_name, block, id)\ argument 156 .reg_name = mm ## block ## id ## _ ## reg_name 503 #define SRII(reg_name, block, id)\ argument 504 .reg_name[id] = mm ## block ## id ## _ ## reg_name
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