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Searched refs:vclk_table (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dvega10_hwmgr.h151 struct vega10_single_dpm_table vclk_table; member
H A Dvega12_hwmgr.h130 struct vega12_single_dpm_table vclk_table; member
H A Dvega12_hwmgr.c603 dpm_table = &(data->dpm_table.vclk_table); in vega12_setup_default_dpm_tables()
1038 min_freq = data->dpm_table.vclk_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1106 max_freq = data->dpm_table.vclk_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()
1983 dpm_table = &(data->dpm_table.vclk_table); in vega12_apply_clocks_adjust_rules()
H A Dvega10_hwmgr.c1356 data->dpm_table.vclk_table.count = 0; in vega10_setup_default_dpm_tables()
1358 dpm_table = &(data->dpm_table.vclk_table); in vega10_setup_default_dpm_tables()
1984 &(data->dpm_table.vclk_table); in vega10_populate_smc_uvd_levels()