Home
last modified time | relevance | path

Searched refs:vdd_dep_on_sclk (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dprocess_pptables_v1_0.c522 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()
561 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()
745 if (pp_table_information->vdd_dep_on_sclk->count < in get_gpio_table()
794 pp_table_information->vdd_dep_on_sclk = NULL; in init_clock_voltage_dependency()
810 &pp_table_information->vdd_dep_on_sclk, sclk_dep_table); in init_clock_voltage_dependency()
838 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_sclk) in init_clock_voltage_dependency()
839 && (0 != pp_table_information->vdd_dep_on_sclk->count)) in init_clock_voltage_dependency()
841 pp_table_information->vdd_dep_on_sclk); in init_clock_voltage_dependency()
1116 kfree(pp_table_information->vdd_dep_on_sclk); in pp_tables_v1_0_uninitialize()
1117 pp_table_information->vdd_dep_on_sclk = NULL; in pp_tables_v1_0_uninitialize()
H A Dsmu_helper.c424 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in phm_get_sclk_for_voltage_evv()
425 voltage_id = table_info->vdd_dep_on_sclk->entries[entry_id].vddInd; in phm_get_sclk_for_voltage_evv()
430 if (entry_id >= table_info->vdd_dep_on_sclk->count) { in phm_get_sclk_for_voltage_evv()
435 *sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk; in phm_get_sclk_for_voltage_evv()
508 vddc_table = table_info->vdd_dep_on_sclk; in phm_apply_dal_min_voltage_request()
H A Dvega10_processpptables.c781 pcie_count = table_info->vdd_dep_on_sclk->count; in get_pcie_table()
907 pp_table_info->vdd_dep_on_sclk = NULL; in init_powerplay_extended_tables()
933 &pp_table_info->vdd_dep_on_sclk, in init_powerplay_extended_tables()
991 pp_table_info->vdd_dep_on_sclk && in init_powerplay_extended_tables()
992 pp_table_info->vdd_dep_on_sclk->count) in init_powerplay_extended_tables()
995 pp_table_info->vdd_dep_on_sclk); in init_powerplay_extended_tables()
1188 kfree(pp_table_info->vdd_dep_on_sclk); in vega10_pp_tables_uninitialize()
1189 pp_table_info->vdd_dep_on_sclk = NULL; in vega10_pp_tables_uninitialize()
H A Dvega10_hwmgr.c314 dep_table[0] = table_info->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()
650 case 1: vdt = table_info->vdd_dep_on_sclk; break; in vega10_patch_voltage_dependency_tables_with_lookup_table()
1158 table_info->vdd_dep_on_sclk, in vega10_construct_voltage_tables()
1277 table_info->vdd_dep_on_sclk; in vega10_setup_default_dpm_tables()
1532 &(data->odn_dpm_table.vdd_dep_on_sclk); in vega10_populate_single_gfx_level()
1534 dep_on_sclk = table_info->vdd_dep_on_sclk; in vega10_populate_single_gfx_level()
2057 table_info->vdd_dep_on_sclk; in vega10_populate_clock_stretcher_table()
2076 table_info->vdd_dep_on_sclk; in vega10_populate_avfs_parameters()
2439 dep_table = table_info->vdd_dep_on_sclk; in vega10_check_dpm_table_updated()
3164 for (count = table_info->vdd_dep_on_sclk->count - 1; in vega10_apply_state_adjust_rules()
[all …]
H A Dsmu7_hwmgr.c765 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_dpm_tables_v1()
832 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_odn_initial_default_setting()
874 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_voltage_range_from_vbios()
930 dep_table = table_info->vdd_dep_on_sclk; in smu7_check_dpm_table_updated()
1719 sclk_table = table_info->vdd_dep_on_sclk; in smu7_get_evv_voltages()
1753 sclk_table = table_info->vdd_dep_on_sclk; in smu7_get_evv_voltages()
1856 table_info->vdd_dep_on_sclk; in smu7_patch_voltage_dependency_tables_with_lookup_table()
2080 table_info->vdd_dep_on_sclk; in smu7_set_private_data_based_on_pptable_v1()
2933 for (count = table_info->vdd_dep_on_sclk->count - 1; in smu7_apply_state_adjust_rules()
2938 table_info->vdd_dep_on_sclk->entries[count].clk; in smu7_apply_state_adjust_rules()
[all …]
H A Dvega10_hwmgr.h294 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_sclk; member
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dvegam_smumgr.c824 table_info->vdd_dep_on_sclk, clock, in vegam_populate_single_graphic_level()
1127 table_info->vdd_dep_on_sclk, in vegam_populate_smc_acpi_level()
1415 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in vegam_populate_smc_initial_state()
1418 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in vegam_populate_smc_initial_state()
1502 table_info->vdd_dep_on_sclk; in vegam_populate_clock_stretcher_data_table()
1585 table_info->vdd_dep_on_sclk; in vegam_populate_avfs_parameters()
H A Dpolaris10_smumgr.c922 vdd_dep_table = table_info->vdd_dep_on_sclk; in polaris10_populate_single_graphic_level()
1214 table_info->vdd_dep_on_sclk, in polaris10_populate_smc_acpi_level()
1487 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in polaris10_populate_smc_initailial_state()
1490 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in polaris10_populate_smc_initailial_state()
1518 table_info->vdd_dep_on_sclk; in polaris10_populate_clock_stretcher_data_table()
1653 table_info->vdd_dep_on_sclk; in polaris10_populate_avfs_parameters()
H A Dfiji_smumgr.c964 vdd_dep_table = table_info->vdd_dep_on_sclk; in fiji_populate_single_graphic_level()
1331 table_info->vdd_dep_on_sclk, in fiji_populate_smc_acpi_level()
1654 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in fiji_populate_smc_initailial_state()
1656 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in fiji_populate_smc_initailial_state()
1686 table_info->vdd_dep_on_sclk; in fiji_populate_clock_stretcher_data_table()
H A Dtonga_smumgr.c622 vdd_dep_table = pptable_info->vdd_dep_on_sclk; in tonga_populate_single_graphic_level()
1575 table_info->vdd_dep_on_sclk; in tonga_populate_clock_stretcher_data_table()
/dragonfly/sys/dev/drm/amd/powerplay/inc/
H A Dhwmgr.h497 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk; member
526 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk; member