| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTLSDynamicCall.cpp | 85 Register InReg = PPC::NoRegister; in processBlock() local
89 InReg = MI.getOperand(1).getReg(); in processBlock()
167 assert(InReg != PPC::NoRegister && "Operand must be a register"); in processBlock()
168 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addReg(InReg); in processBlock()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Lanai.cpp | 126 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
134 if (InReg) in classifyArgumentType()
138 if (InReg) in classifyArgumentType()
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| H A D | Sparc.cpp | 133 bool InReg; member
136 : Context(c), DL(dl), Size(0), InReg(false) {} in CoerceBuilder()
171 InReg = true; in addFloat()
271 if (CB.InReg) in classifyType()
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| H A D | X86.cpp | 158 bool shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg,
675 bool &InReg, in shouldAggregateUseDirect() argument
684 InReg = !IsMCUABI; in shouldAggregateUseDirect()
811 bool InReg; in classifyArgumentType() local
812 if (shouldAggregateUseDirect(Ty, State, InReg, NeedsPadding)) { in classifyArgumentType()
816 if (InReg) in classifyArgumentType()
886 bool InReg = shouldPrimitiveUseInReg(Ty, State); in classifyArgumentType() local
889 if (InReg) in classifyArgumentType()
896 if (InReg) in classifyArgumentType()
903 if (InReg) in classifyArgumentType()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | JMCInstrumenter.cpp | 145 DefaultCheckFunc->addParamAttr(0, Attribute::InReg); in createDefaultCheckFunction()
207 CheckFunc->addParamAttr(0, Attribute::InReg); in runImpl()
234 CI->addParamAttr(0, Attribute::InReg); in runImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Arm64ECCallLowering.cpp | 216 auto InRegAttr = AttrList.getParamAttr(0, Attribute::InReg); in getThunkRetType()
368 auto InReg = Attrs.getParamAttr(0, Attribute::InReg); in buildExitThunk() local
369 if (SRet.isValid() && !InReg.isValid()) in buildExitThunk()
505 Thunk->addParamAttr(5, Attribute::InReg); in buildEntryThunk()
520 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildEntryThunk()
611 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildGuestExitThunk()
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| /freebsd/contrib/llvm-project/clang/include/clang/CodeGen/ |
| H A D | CGFunctionInfo.h | 116 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
139 SRetAfterThis(false), InReg(false), CanBeFlattened(false),
380 return InReg; in getInReg()
385 InReg = IR; in setInReg()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 110 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee()
134 IsInReg = Call.hasRetAttr(Attribute::InReg);
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| H A D | TargetLowering.h | 4433 IsInReg = ResultAttrs.hasAttribute(Attribute::InReg);
4450 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILPrepare.cpp | 43 Attribute::InReg, in isValidForDXIL()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 456 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
492 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
493 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
503 Tmp0 = InReg; in LowerFPToInt()
505 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
513 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
529 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg); in LowerFPToInt()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 275 Arg.hasAttribute(Attribute::InReg) || in lowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 633 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
640 if (CC == CallingConv::AMDGPU_PS && !InReg && PSInputNum <= 15) { in lowerFormalArguments()
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| H A D | AMDGPUMachineCFGStructurizer.cpp | 2682 unsigned InReg = LRegion->getBBSelectRegIn(); in structurizeComplexRegion() local
2684 MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2685 Register NewInReg = MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2690 LRegion->replaceRegisterInsideRegion(InReg, InnerSelectReg, false, MRI); in structurizeComplexRegion()
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| H A D | AMDGPUAttributor.cpp | 932 Arg.addAttr(Attribute::InReg); in addPreloadKernArgHint()
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| H A D | AMDGPUInstructionSelector.cpp | 2394 bool InReg = I.getOpcode() == AMDGPU::G_SEXT_INREG; in selectG_SZA_EXT() local
2395 bool Signed = I.getOpcode() == AMDGPU::G_SEXT || InReg; in selectG_SZA_EXT()
2461 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? in selectG_SZA_EXT()
2479 unsigned SubReg = InReg ? AMDGPU::sub0 : AMDGPU::NoSubRegister; in selectG_SZA_EXT()
2503 if (DstSize > 32 && (SrcSize <= 32 || InReg)) { in selectG_SZA_EXT()
2507 unsigned SubReg = InReg ? AMDGPU::sub0 : AMDGPU::NoSubRegister; in selectG_SZA_EXT()
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| H A D | AMDGPUAsmPrinter.cpp | 778 if (Arg.hasAttribute(Attribute::InReg)) { in getSIProgramInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 1238 Register InReg = Record.payload.Reg; in visitGCRelocate() local
1240 DAG.getDataLayout(), InReg, Relocate.getType(), in visitGCRelocate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 2760 return A->hasAttribute(Attribute::InReg) || in isArgPassedInSGPR()
2764 return A->hasAttribute(Attribute::InReg); in isArgPassedInSGPR()
2787 return CB->paramHasAttr(ArgNo, Attribute::InReg) || in isArgPassedInSGPR()
2790 return CB->paramHasAttr(ArgNo, Attribute::InReg); in isArgPassedInSGPR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 1257 Register InReg = PHI->getOperand(PHIOp).getReg(); in needVSETVLIPHI() local
1266 MachineInstr *DefMI = MRI->getVRegDef(InReg); in needVSETVLIPHI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86WinEHState.cpp | 411 Call->addParamAttr(0, Attribute::InReg); in generateLSDAInEAXThunk()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Attributes.td | 116 def InReg : EnumAttr<"inreg", [ParamAttr, RetAttr]>;
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Verifier.cpp | 1884 Attrs.hasAttribute(Attribute::InReg); in verifyParameterAttrs()
3650 Check(!Attrs.contains(Attribute::InReg), in verifyTailCCMustTailAttrs()
3675 Attribute::InReg, Attribute::StackAlignment, Attribute::SwiftSelf, in getParameterABIAttributes()
6033 Check(Call.paramHasAttr(2, Attribute::InReg), in visitIntrinsicCall()
6035 Check(!Call.paramHasAttr(3, Attribute::InReg), in visitIntrinsicCall()
6054 Check(!Call.paramHasAttr(InactiveIdx, Attribute::InReg), in visitIntrinsicCall()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGCall.cpp | 2585 RetAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2638 SRETAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2704 llvm::AttrBuilder(getLLVMContext()).addAttribute(llvm::Attribute::InReg)); in ConstructAttributeList()
2728 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2736 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 42 if (AttrFn(Attribute::InReg)) in addFlagsUsingAttrFn()
|