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Searched refs:IsISA3_0 (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DPPC.cpp87 IsISA3_0 = true; in handleTargetFeatures()
701 .Case("isa-v30-instructions", IsISA3_0) in hasFeature()
H A DPPC.h80 bool IsISA3_0 = false; variable
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstr64Bit.td357 Requires<[IsISA3_0]>;
428 Requires<[IsISA3_0]>;
899 Requires<[IsISA3_0]>;
902 IIC_IntCompare, []>, Requires<[IsISA3_0]>;
922 Requires<[IsISA3_0]>, ZExt32To64, SExt32To64;
971 isPPC64, Requires<[IsISA3_0]>;
975 []>, isPPC64, Requires<[IsISA3_0]>;
1036 let Predicates = [IsISA3_0] in {
1949 let Predicates = [IsISA3_0, In64BitMode] in {
1976 let Predicates = [IsISA3_0] in {
[all …]
H A DPPCScheduleP7.td32 PairedVectorMemops, IsISA3_0, IsISA2_07,
H A DPPCScheduleP8.td24 IsISA3_0, IsISA3_1, IsISAFuture];
H A DPPCInstrInfo.td718 def IsISA3_0 : Predicate<"Subtarget->isISA3_0()">;
1654 let Predicates = [IsISA3_0], hasNoSchedulingInfo = 1 in {
1894 Requires<[IsISA3_0]>;
1913 Requires<[IsISA3_0]>;
2366 Requires<[IsISA3_0]>;
2431 [(set i32:$RA, (cttz i32:$RST))]>, Requires<[IsISA3_0]>,
2804 "mcrxrx $BF", IIC_BrMCRX>, Requires<[IsISA3_0]>;
2880 let Predicates = [IsISA3_0] in {
5050 let Predicates = [IsISA3_0] in {
5072 } // IsISA3_0
[all …]
H A DPPC.td266 def FeatureISA3_0 : SubtargetFeature<"isa-v30-instructions", "IsISA3_0",
H A DPPCInstrVSX.td1341 let Predicates = [HasVSX, IsISA3_0, HasDirectMove] in {
1353 } // HasVSX, IsISA3_0, HasDirectMove
2441 // similar with ISA 3.0 with Power9Vector, Power9Altivec, IsISA3_0. Then there
2479 // [HasVSX, IsISA3_0, HasDirectMove, IsBigEndian, IsPPC64]
2480 // [HasVSX, IsISA3_0, HasDirectMove, IsLittleEndian]
5075 let Predicates = [HasVSX, IsISA3_0, HasDirectMove, IsBigEndian, IsPPC64] in {
5088 } // HasVSX, IsISA3_0, HasDirectMove, IsBigEndian, IsPPC64
5091 let Predicates = [HasVSX, IsISA3_0, HasDirectMove, IsLittleEndian] in {
5104 } // HasVSX, IsISA3_0, HasDirectMove, IsLittleEndian