Home
last modified time | relevance | path

Searched refs:Pat (Results 1 – 25 of 144) sorted by relevance

123456

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepMapAsm2Intrin.td14 def: Pat<(int_hexagon_A2_abs IntRegs:$src1),
16 def: Pat<(int_hexagon_A2_absp DoubleRegs:$src1),
18 def: Pat<(int_hexagon_A2_abssat IntRegs:$src1),
62 def: Pat<(int_hexagon_A2_aslh IntRegs:$src1),
1792 def: Pat<(int_hexagon_Y6_dmpause ),
1794 def: Pat<(int_hexagon_Y6_dmpoll ),
1800 def: Pat<(int_hexagon_Y6_dmwait ),
2137 def: Pat<(int_hexagon_V6_vd0 ),
2139 def: Pat<(int_hexagon_V6_vd0_128B ),
3251 def: Pat<(int_hexagon_V6_vdd0 ),
[all …]
H A DHexagonIntrinsics.td12 : Pat <(IntID I32:$Rs),
16 : Pat <(IntID I32:$Rs, I32:$Rt),
20 : Pat <(IntID I32:$Rs, I64:$Rt),
72 def: Pat<(int_hexagon_A2_sxtb IntRegs:$Rs),
82 def : Pat <(int_hexagon_A2_not I32:$Rs),
86 def : Pat <(int_hexagon_A2_neg I32:$Rs),
282 def: Pat<(v64i16 (trunc v64i32:$Vdd)),
358 def: Pat<(int_hexagon_V6_vd0),
360 def: Pat<(int_hexagon_V6_vd0_128B ),
363 def: Pat<(int_hexagon_V6_vdd0),
[all …]
H A DHexagonPatternsHVX.td137 def: Pat<(ResType (Load I32:$Rt)),
211 def: Pat<(Store Value:$Vs, I32:$Rt),
534 def: Pat<(mul HVI8:$Vs, HVI8:$Vt),
573 def: Pat<(VecI8 (trunc
579 def: Pat<(VecQ8 (trunc HVI8:$Vs)),
637 def: Pat<(shl HVI8:$Vs, HVI8:$Vt),
640 def: Pat<(sra HVI8:$Vs, HVI8:$Vt),
643 def: Pat<(srl HVI8:$Vs, HVI8:$Vt),
741 def: Pat<(VecI8 (ctpop HVI8:$Vs)),
749 def: Pat<(VecI8 (ctlz HVI8:$Vs)),
[all …]
H A DHexagonMapAsm2IntrinV62.gen.td10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
32 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2),
39 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2, HvxVR:$src3),
47 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2),
54 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2, IntRegs:$src3),
70 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2),
85 def: Pat<(IntID HvxQR:$src1, HvxVR:$src2),
92 def: Pat<(IntID IntRegs:$src1),
99 def: Pat<(IntID HvxQR:$src1, HvxQR:$src2),
[all …]
H A DHexagonIntrinsicsV60.td70 def : Pat <(v64i1 (load (i32 IntRegs:$addr))),
91 def: Pat<(IntID HvxVR:$src1),
99 def: Pat<(IntID HvxWR:$src1),
107 def: Pat<(IntID HvxQR:$src1),
115 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2),
123 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
131 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2),
139 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2),
147 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
163 def: Pat<(IntID HvxQR:$src1, HvxQR:$src2),
[all …]
H A DHexagonPatterns.td429 def: Pat<(i64 imm:$v),
531 def: Pat<(v4i8 (azext V4I1:$Pu)),
535 def: Pat<(v8i8 (azext V8I1:$Pu)),
573 def: Pat<(v8i1 (trunc V8I8:$Rs)),
1490 def: Pat<(fabs F64:$Rs),
1493 def: Pat<(fneg F64:$Rs),
1917 def: Pat<(bitreverse V4I16:$Rs),
1922 def: Pat<(bitreverse V2I32:$Rs),
1972 def: Pat<(i1 (trunc I32:$Rs)),
2483 def: Pat<(i1 (load I32:$Rs)),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrIntrinsicVL.gen.td640 def : Pat<(int_ve_vl_vseq_vl i32:$vl), (VSEQl i32:$vl)>;
642 def : Pat<(int_ve_vl_pvseqlo_vl i32:$vl), (PVSEQLOl i32:$vl)>;
644 def : Pat<(int_ve_vl_pvsequp_vl i32:$vl), (PVSEQUPl i32:$vl)>;
646 def : Pat<(int_ve_vl_pvseq_vl i32:$vl), (PVSEQl i32:$vl)>;
1062 def : Pat<(int_ve_vl_vfmklat_ml i32:$vl), (VFMKLal i32:$vl)>;
1063 def : Pat<(int_ve_vl_vfmklaf_ml i32:$vl), (VFMKLnal i32:$vl)>;
1064 def : Pat<(int_ve_vl_pvfmkat_Ml i32:$vl), (VFMKyal i32:$vl)>;
1655 def : Pat<(int_ve_vl_fencei ), (FENCEI )>;
1656 def : Pat<(int_ve_vl_fencem_s uimm2:$I), (FENCEM (LO7 $I))>;
1657 def : Pat<(int_ve_vl_fencec_s uimm3:$I), (FENCEC (LO7 $I))>;
[all …]
H A DVEInstrPatternsVec.td19 def: Pat<(i64 (repl_f32 f32:$val)),
23 def: Pat<(i64 (repl_i32 i32:$val)),
34 def : Pat<(v256i1 (load ADDRrii:$addr)),
36 def : Pat<(v512i1 (load ADDRrii:$addr)),
38 def : Pat<(store v256i1:$vx, ADDRrii:$addr),
40 def : Pat<(store v512i1:$vx, ADDRrii:$addr),
50 def : Pat<(v32 (vec_broadcast s32:$sy, i32:$vl)),
61 def : Pat<(v64 (vec_broadcast s64:$sy, i32:$vl)),
69 def: Pat<(s32 (extractelt v32:$vec, uimm7:$idx)),
72 def: Pat<(s32 (extractelt v32:$vec, i64:$idx)),
[all …]
H A DVEInstrIntrinsicVL.td6 def : Pat<(i64 (int_ve_vl_pack_f32p ADDRrii:$addr0, ADDRrii:$addr1)),
10 def : Pat<(i64 (int_ve_vl_pack_f32a ADDRrii:$addr)),
18 def : Pat<(v256i1 (int_ve_vl_extract_vm512u v512i1:$vm)),
21 def : Pat<(v256i1 (int_ve_vl_extract_vm512l v512i1:$vm)),
24 def : Pat<(v512i1 (int_ve_vl_insert_vm512u v512i1:$vmx, v256i1:$vmy)),
33 def : Pat<(int_ve_vl_vmrgw_vsvMvl i32:$sy, v256f64:$vz, v512i1:$vm,
39 def : Pat<(int_ve_vl_vmv_vsvl i32:$sy, v256f64:$vz, i32:$vl),
49 def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz),
53 def : Pat<(int_ve_vl_lvsl_svs v256f64:$vx, i32:$sy),
55 def : Pat<(int_ve_vl_lvsd_svs v256f64:$vx, i32:$sy),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrTBM.td79 def : Pat<(and GR64:$src, AndMask64:$mask),
92 def : Pat<(and GR32:$src, (add GR32:$src, 1)),
94 def : Pat<(and GR64:$src, (add GR64:$src, 1)),
103 def : Pat<(or GR32:$src, (sub -2, GR32:$src)),
105 def : Pat<(or GR64:$src, (sub -2, GR64:$src)),
113 def : Pat<(xor GR32:$src, (add GR32:$src, 1)),
115 def : Pat<(xor GR64:$src, (add GR64:$src, 1)),
118 def : Pat<(or GR32:$src, (add GR32:$src, 1)),
120 def : Pat<(or GR64:$src, (add GR64:$src, 1)),
123 def : Pat<(or GR32:$src, (add GR32:$src, -1)),
[all …]
H A DX86InstrVecCompiler.td39 def : Pat<(v8f16 (scalar_to_vector FR16:$src)),
42 def : Pat<(v4f32 (scalar_to_vector FR32:$src)),
45 def : Pat<(v2f64 (scalar_to_vector FR64:$src)),
50 def : Pat<(v8f16 (scalar_to_vector FR16X:$src)),
53 def : Pat<(v4f32 (scalar_to_vector FR32X:$src)),
396 def : Pat<(alignedloadf128 addr:$src),
398 def : Pat<(loadf128 addr:$src),
408 def : Pat<(alignedloadf128 addr:$src),
410 def : Pat<(loadf128 addr:$src),
420 def : Pat<(alignedloadf128 addr:$src),
[all …]
H A DX86InstrCompiler.td1354 def : Pat<(X86cmp GR8:$src1, 0),
1356 def : Pat<(X86cmp GR16:$src1, 0),
1358 def : Pat<(X86cmp GR32:$src1, 0),
1360 def : Pat<(X86cmp GR64:$src1, 0),
1482 def : Pat<(xor GR8:$src1, -128),
1496 def : Pat<(add GR16:$src1, 128),
1501 def : Pat<(add GR32:$src1, 128),
1506 def : Pat<(add GR64:$src1, 128),
1600 def : Pat<(and GR64:$src, 0xff),
1656 def: Pat<(i16 (sext GR8:$src)),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td75 def : Pat<(relaxed_load<atomic_load_az_8>
107 def : Pat<(relaxed_load<atomic_load_32>
123 def : Pat<(relaxed_load<atomic_load_64>
311 def : Pat<(ldxr_1 GPR64sp:$addr),
313 def : Pat<(ldxr_2 GPR64sp:$addr),
315 def : Pat<(ldxr_4 GPR64sp:$addr),
352 def : Pat<(ldaxr_1 GPR64sp:$addr),
354 def : Pat<(ldaxr_2 GPR64sp:$addr),
356 def : Pat<(ldaxr_4 GPR64sp:$addr),
555 def : Pat<(v1i64 (scalar_to_vector
[all …]
H A DAArch64InstrInfo.td1957 def : Pat<(f32 fpimm:$in),
1959 def : Pat<(f64 fpimm:$in),
4598 def : Pat<(bf16 fpimm0),
5875 def : Pat<(v4i16 (opnode
5883 def : Pat<(v2i32 (opnode
8036 : Pat<(scalar_store
8053 : Pat<(scalar_store
8069 def : Pat<(scalar_store
8075 def : Pat<(scalar_store
8095 def : Pat<(scalar_store
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZfh.td269 def : Pat<(f16 (fneg FPR16:$rs1)), (FSGNJN_H $rs1, $rs1)>;
270 def : Pat<(f16 (fabs FPR16:$rs1)), (FSGNJX_H $rs1, $rs1)>;
272 def : Pat<(riscv_fclass (f16 FPR16:$rs1)), (FCLASS_H $rs1)>;
276 def : Pat<(f16 (fcopysign FPR16:$rs1, FPR32:$rs2)),
311 def : Pat<(fneg FPR16INX:$rs1), (FSGNJN_H_INX $rs1, $rs1)>;
312 def : Pat<(fabs FPR16INX:$rs1), (FSGNJX_H_INX $rs1, $rs1)>;
318 def : Pat<(fcopysign FPR16INX:$rs1, FPR32INX:$rs2),
429 def : Pat<(store (f16 FPR16INX:$rs2),
571 def : Pat<(f16 (fcopysign FPR16:$rs1, FPR64:$rs2)),
583 def : Pat<(fcopysign FPR16INX:$rs1, FPR64IN32X:$rs2),
[all …]
H A DRISCVInstrInfoD.td279 def : Pat<(fneg FPR64:$rs1), (FSGNJN_D $rs1, $rs1)>;
280 def : Pat<(fabs FPR64:$rs1), (FSGNJX_D $rs1, $rs1)>;
282 def : Pat<(riscv_fclass FPR64:$rs1), (FCLASS_D $rs1)>;
292 def : Pat<(any_fma FPR64:$rs1, FPR64:$rs2, FPR64:$rs3),
315 def : Pat<(fneg FPR64INX:$rs1), (FSGNJN_D_INX $rs1, $rs1)>;
316 def : Pat<(fabs FPR64INX:$rs1), (FSGNJX_D_INX $rs1, $rs1)>;
321 def : Pat<(fcopysign FPR64INX:$rs1, (fneg FPR64INX:$rs2)),
323 def : Pat<(fcopysign FPR64INX:$rs1, FPR32INX:$rs2),
325 def : Pat<(fcopysign FPR32INX:$rs1, FPR64INX:$rs2),
360 def : Pat<(fcopysign FPR64IN32X:$rs1, FPR32INX:$rs2),
[all …]
H A DRISCVGISel.td86 def : Pat<(XLenVT (sub GPR:$rs1, simm12Plus1:$imm)),
90 def : Pat<(i32 (sub GPR:$rs1, simm12Plus1i32:$imm)),
106 def : Pat<(XLenVT (setlt (PtrVT GPR:$rs1), simm12:$imm12)),
117 def : Pat<(XLenVT (seteq (Ty GPR:$rs1), (Ty GPR:$rs2))),
122 def : Pat<(XLenVT (setne (Ty GPR:$rs1), (Ty GPR:$rs2))),
127 def : Pat<(XLenVT (setugt (Ty GPR:$rs1), (Ty GPR:$rs2))),
131 def : Pat<(XLenVT (setgt (Ty GPR:$rs1), (Ty GPR:$rs2))),
135 def : Pat<(XLenVT (setuge (Ty GPR:$rs1), (Ty GPR:$rs2))),
139 def : Pat<(XLenVT (setge (Ty GPR:$rs1), (Ty GPR:$rs2))),
143 def : Pat<(XLenVT (setule (Ty GPR:$rs1), (Ty GPR:$rs2))),
[all …]
H A DRISCVInstrInfoZb.td539 def : Pat<(riscv_rolw GPR:$rs1, uimm5:$rs2),
616 def : Pat<(i64 (riscv_absw GPR:$rs1)),
645 def : Pat<(and (or (shl GPR:$rs2, (XLenVT 8)),
714 def : Pat<(mul (XLenVT GPR:$r), C3LeftShift:$i),
717 def : Pat<(mul (XLenVT GPR:$r), C5LeftShift:$i),
720 def : Pat<(mul (XLenVT GPR:$r), C9LeftShift:$i),
724 def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 11)),
726 def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 19)),
728 def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 13)),
730 def : Pat<(mul_const_oneuse GPR:$r, (XLenVT 21)),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrVSX.td4389 def : Pat<(f32 (PPCfcfids
4396 def : Pat<(f64 (PPCfcfidu
4402 def : Pat<(f64 (PPCfcfid
4429 def : Pat<(f32 (PPCfcfids
4436 def : Pat<(f64 (PPCfcfidu
4442 def : Pat<(f64 (PPCfcfid
4694 def : Pat<(f32 (PPCfcfids
4702 def : Pat<(f64 (PPCfcfidu
4708 def : Pat<(f64 (PPCfcfid
4741 def : Pat<(f32 (PPCfcfids
[all …]
H A DPPCInstrHTM.td100 def : Pat<(int_ppc_tend i32:$R),
118 def : Pat<(int_ppc_tcheck),
124 def : Pat<(int_ppc_trechkpt),
127 def : Pat<(int_ppc_tsr i32:$L),
130 def : Pat<(int_ppc_get_texasr),
133 def : Pat<(int_ppc_get_texasru),
136 def : Pat<(int_ppc_get_tfhar),
139 def : Pat<(int_ppc_get_tfiar),
157 def : Pat<(int_ppc_tendall),
160 def : Pat<(int_ppc_tresume),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstr64Bit.td39 def : Pat<(i64 (zext i32:$val)), (SRLri $val, 0)>;
40 def : Pat<(i64 (sext i32:$val)), (SRAri $val, 0)>;
64 def : Pat<(i64 0), (COPY (i64 G0))>,
73 def : Pat<(i64 SETHIimm:$val), (SETHIi (HI22 $val))>;
136 def : Pat<(i64 imm:$val),
148 def : Pat<(and i64:$lhs, i64:$rhs), (ANDrr $lhs, $rhs)>;
171 def : Pat<(i64 (ctpop i64:$src)), (POPCrr $src)>;
433 def : Pat<(SPselectxcc i64:$t, i64:$f, imm:$cond),
438 def : Pat<(SPselecticc i64:$t, i64:$f, imm:$cond),
443 def : Pat<(SPselectfcc i64:$t, i64:$f, imm:$cond),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrCompiler.td11 /// as well as Pat patterns used during instruction selection.
25 def : Pat<(add MxDRD32:$src, (MxWrapper tconstpool:$opd)),
27 def : Pat<(add MxARD32:$src, (MxWrapper tjumptable:$opd)),
29 def : Pat<(add MxARD32:$src, (MxWrapper tglobaladdr :$opd)),
31 def : Pat<(add MxARD32:$src, (MxWrapper texternalsym:$opd)),
33 def : Pat<(add MxARD32:$src, (MxWrapper tblockaddress:$opd)),
36 def : Pat<(store (i32 (MxWrapper tglobaladdr:$src)), iPTR:$dst),
100 def : Pat<(MxTCRet (load MxCP_ARII:$dst), imm:$adj),
104 def : Pat<(MxTCRet AR32_TC:$dst, imm:$adj),
107 def : Pat<(MxTCRet (i32 tglobaladdr:$dst), imm:$adj),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td398 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOGE)),
404 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOLT)),
410 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)),
416 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)),
428 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm, SETUO)),
434 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETGE)),
440 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETLT)),
446 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETLE)),
452 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETGT)),
460 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm, SETO)),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLASXInstrInfo.td1579 def : Pat<(lasxsplatf32 FPR32:$fj),
1581 def : Pat<(lasxsplatf64 FPR64:$fj),
1621 def : Pat<(v4f64 (sint_to_fp v4i32:$vj)),
1624 def : Pat<(v4f32 (sint_to_fp v4i64:$vj)),
1632 def : Pat<(v4f64 (uint_to_fp v4i32:$vj)),
1673 // Pat<(Intrinsic vty:$xj, vty:$xk),
1775 // Pat<(Intrinsic vty:$xj),
1803 // Pat<(Intrinsic timm:$imm)
1812 // Pat<(Intrinsic vty:$xj, timm:$imm)
1906 // Pat<(Intrinsic vty:$xj, vty:$xk),
[all …]
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DGlobalISelCombinerEmitter.cpp173 const Pattern *Pat = nullptr; member in __anoned09a36a0111::PrettyStackTraceEmit
177 : Def(Def), Pat(Pat) {} in PrettyStackTraceEmit()
187 if (Pat) in print()
188 OS << " [" << Pat->getKindName() << " '" << Pat->getName() << "']"; in print()
819 [this](auto Pat) { return addMatchPattern(std::move(Pat)); }, "match", in parseAll() argument
825 [this](auto Pat) { return addApplyPattern(std::move(Pat)); }, "apply", in parseAll() argument
936 if (!Pat) in verify()
940 Pat->dump(); in verify()
1559 Pat = in parseInstructionPattern()
1591 return std::move(Pat); in parseInstructionPattern()
[all …]

123456