/freebsd/contrib/byacc/test/btyacc/ |
H A D | quote_calc2-s.output | 41 "SUB" shift 3 62 "SUB" shift 3 84 "SUB" reduce 15 96 "SUB" shift 3 124 "SUB" shift 17 191 "SUB" shift 3 231 "SUB" shift 3 244 "SUB" shift 3 257 "SUB" shift 3 270 "SUB" shift 3 [all …]
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H A D | quote_calc2.output | 41 "SUB" shift 3 62 "SUB" shift 3 84 "SUB" reduce 15 96 "SUB" shift 3 124 "SUB" shift 17 191 "SUB" shift 3 231 "SUB" shift 3 244 "SUB" shift 3 257 "SUB" shift 3 270 "SUB" shift 3 [all …]
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H A D | quote_calc4.output | 41 "SUB-operator" shift 3 62 "SUB-operator" shift 3 84 "SUB-operator" reduce 15 96 "SUB-operator" shift 3 124 "SUB-operator" shift 17 191 "SUB-operator" shift 3 231 "SUB-operator" shift 3 244 "SUB-operator" shift 3 257 "SUB-operator" shift 3 270 "SUB-operator" shift 3 [all …]
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H A D | quote_calc4-s.output | 41 "SUB-operator" shift 3 62 "SUB-operator" shift 3 84 "SUB-operator" reduce 15 96 "SUB-operator" shift 3 124 "SUB-operator" shift 17 191 "SUB-operator" shift 3 231 "SUB-operator" shift 3 244 "SUB-operator" shift 3 257 "SUB-operator" shift 3 270 "SUB-operator" shift 3 [all …]
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H A D | quote_calc.tab.h | 7 #define SUB 260 macro
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H A D | quote_calc2.tab.h | 7 #define SUB 260 macro
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/freebsd/contrib/byacc/test/yacc/ |
H A D | quote_calc2-s.output | 41 "SUB" shift 3 62 "SUB" shift 3 84 "SUB" reduce 15 96 "SUB" shift 3 124 "SUB" shift 17 191 "SUB" shift 3 231 "SUB" shift 3 244 "SUB" shift 3 257 "SUB" shift 3 270 "SUB" shift 3 [all …]
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H A D | quote_calc2.output | 41 "SUB" shift 3 62 "SUB" shift 3 84 "SUB" reduce 15 96 "SUB" shift 3 124 "SUB" shift 17 191 "SUB" shift 3 231 "SUB" shift 3 244 "SUB" shift 3 257 "SUB" shift 3 270 "SUB" shift 3 [all …]
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H A D | quote_calc4.output | 41 "SUB-operator" shift 3 62 "SUB-operator" shift 3 84 "SUB-operator" reduce 15 96 "SUB-operator" shift 3 124 "SUB-operator" shift 17 191 "SUB-operator" shift 3 231 "SUB-operator" shift 3 244 "SUB-operator" shift 3 257 "SUB-operator" shift 3 270 "SUB-operator" shift 3 [all …]
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H A D | quote_calc4-s.output | 41 "SUB-operator" shift 3 62 "SUB-operator" shift 3 84 "SUB-operator" reduce 15 96 "SUB-operator" shift 3 124 "SUB-operator" shift 17 191 "SUB-operator" shift 3 231 "SUB-operator" shift 3 244 "SUB-operator" shift 3 257 "SUB-operator" shift 3 270 "SUB-operator" shift 3 [all …]
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H A D | quote_calc.tab.h | 4 #define SUB 260 macro
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H A D | quote_calc2.tab.h | 4 #define SUB 260 macro
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/freebsd/contrib/bsnmp/snmpd/ |
H A D | snmpmod.h | 83 if (index_compare(OID, SUB, &_lelem->INDEX) < 0) \ 170 if ((OID)->len - SUB != 1) \ 182 if ((OID)->len - SUB == 0) \ 195 if ((FUNC)(OID, SUB, _lelem) == 0) \ 204 if ((FUNC)(OID, SUB, _lelem) < 0) \ 243 #define FIND_OBJECT_OID(LIST, OID, SUB) \ argument 246 #define FIND_OBJECT_INT(LIST, OID, SUB) \ argument 249 #define FIND_OBJECT_FUNC(LIST, OID, SUB, FUNC) \ argument 252 #define NEXT_OBJECT_OID(LIST, OID, SUB) \ argument 255 #define NEXT_OBJECT_INT(LIST, OID, SUB) \ argument [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiAluCode.h | 24 SUB = 0x02, enumerator 81 case SUB: in lanaiAluCodeToString() 106 .Case("sub", SUB) in stringToLanaiAluCode()
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/freebsd/crypto/openssl/crypto/bn/asm/ |
H A D | bn-c64xplus.asm | 173 [A2] SUB A1:A0,1,A1:A0 200 [!A1] SUB A3,A6,A3 ; hi-=dv 209 [!A1] SUB A3,A6,A3 ; hi-=dv 236 || SUB B0,2,B1 ; N-2, initial ILC 237 || SUB B0,1,B2 ; const B2=N-1 247 || SUB A0,1,A0 272 || [A0] SUB.L A0,1,A0
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelDAGToDAG.cpp | 92 if (Addr.getOpcode() != ISD::ADD && Addr.getOpcode() != ISD::SUB && in SelectAddrModeS9() 108 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeS9() 137 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeFar()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedTSV110.td | 396 def : InstRW<[TSV110WrIEReg], (instregex "^(ADD|SUB)[WX]r(x|x64)$")>; 401 def : InstRW<[TSV110WrIERegBr], (instregex "^(ADD|SUB)S[WX]r(x|x64)$")>; 496 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^FN?M(ADD|SUB)Hrrr")>; 497 def : InstRW<[TSV110Wr_5cyc_1F], (instregex "^FN?M(ADD|SUB)Srrr")>; 498 def : InstRW<[TSV110Wr_7cyc_1F], (instregex "^FN?M(ADD|SUB)Drrr")>; 500 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^F(ADD|SUB)Hrr")>; 501 def : InstRW<[TSV110Wr_5cyc_1F], (instregex "^F(ADD|SUB)Srr")>; 502 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^F(ADD|SUB)Drr")>; 561 def : InstRW<[TSV110Wr_4cyc_1FSU1_1FSU2], (instregex "^[SU]H(ADD|SUB)v")>; 563 def : InstRW<[TSV110Wr_4cyc_1FSU1_1FSU2], (instregex "^[SU]Q(ADD|SUB)v")>; [all …]
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H A D | AArch64SchedExynosM4.td | 602 def : InstRW<[M4WriteAX], (instregex "^(ADD|SUB)S?[WX]rx(64)?$")>; 636 def : InstRW<[M4WriteFADD2H], (instregex "^F(ADD|SUB)Hrr")>; 637 def : InstRW<[M4WriteFADD2], (instregex "^F(ADD|SUB)[SD]rr")>; 652 M4ReadFMACM1], (instregex "^FN?M(ADD|SUB)Hrrr")>; 654 M4ReadFMACM1], (instregex "^FN?M(ADD|SUB)[SD]rrr")>; 733 def : InstRW<[M4WriteNALU1], (instregex "^(ADD|NEG|SUB)v")>; 735 def : InstRW<[M4WriteNHAD3], (instregex "^[SU]H(ADD|SUB)v")>; 736 def : InstRW<[M4WriteNHAD3], (instregex "^[SU](ADD|SUB)[LW]v")>; 737 def : InstRW<[M4WriteNHAD3], (instregex "^R?(ADD|SUB)HN2?v")>; 738 def : InstRW<[M4WriteNHAD3], (instregex "^[SU]Q(ADD|SUB)v")>; [all …]
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H A D | AArch64SchedExynosM5.td | 641 def : InstRW<[M5WriteAXW], (instregex "^(ADD|AND|BIC|SUB)SWrs$")>; 642 def : InstRW<[M5WriteAXX], (instregex "^(ADD|AND|BIC|SUB)SXrs$")>; 643 def : InstRW<[M5WriteAXW], (instregex "^(ADD|SUB)S?Wrx(64)?$")>; 644 def : InstRW<[M5WriteAXX], (instregex "^(ADD|SUB)S?Xrx(64)?$")>; 702 def : InstRW<[M5WriteFADD2], (instregex "^F(ADD|SUB)[HSD]rr")>; 714 M5ReadFMACM1], (instregex "^FN?M(ADD|SUB)[HSD]rrr")>; 781 def : InstRW<[M5WriteNALU2], (instregex "^(ADD|NEG|SUB)v")>; 783 def : InstRW<[M5WriteNHAD3], (instregex "^[SU]H(ADD|SUB)v")>; 784 def : InstRW<[M5WriteNHAD3], (instregex "^[SU](ADD|SUB)[LW]v")>; 785 def : InstRW<[M5WriteNHAD3], (instregex "^R?(ADD|SUB)HN2?v")>; [all …]
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H A D | AArch64SchedExynosM3.td | 501 def : InstRW<[M3WriteAX], (instregex "^(ADD|AND|BIC|EON|EOR|ORN|SUB)[WX]rs$")>; 503 def : InstRW<[M3WriteAX], (instregex "^(ADD|SUB)S?[WX]rx(64)?$")>; 504 def : InstRW<[M3WriteAX], (instregex "^(ADD|AND|BIC|SUB)S[WX]rs$")>; 538 def : InstRW<[M3WriteFADD2], (instregex "^F(ADD|SUB)[DS]rr")>; 544 M3ReadFMAC], (instregex "^FN?M(ADD|SUB)[DS]rrr")>; 611 def : InstRW<[M3WriteNALU1], (instregex "^(ADD|NEG|SUB)v")>; 613 def : InstRW<[M3WriteNMSC3], (instregex "^[SU]H(ADD|SUB)v")>; 614 def : InstRW<[M3WriteNMSC3], (instregex "^[SU](ADD|SUB)[LW]V?v")>; 615 def : InstRW<[M3WriteNMSC3], (instregex "^R?(ADD|SUB)HN2?v")>; 616 def : InstRW<[M3WriteNMSC3], (instregex "^[SU]Q(ADD|SUB)v")>; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SchedSapphireRapids.td | 573 def : InstRW<[SPRWriteResGroup6], (instregex "^(ADD|SUB)64ri8$", 608 def : InstRW<[SPRWriteResGroup9], (instregex "^(V?)(ADD|SUB)PSrr$", 610 "^V(ADD|SUB)PSYrr$", 624 "^SUB(R?)_F(32|64)m$", 650 "^SUB(R?)_FI(16|32)m$")>; 662 "^SUB(R?)_F(P?)rST0$", 663 "^SUB(R?)_FST0r$", 1188 "^V(ADD|SUB)SHZrr$", 2069 def : InstRW<[SPRWriteResGroup184], (instregex "^(V?)PH(ADD|SUB)SWrr$", 2070 "^VPH(ADD|SUB)SWYrr$")>; [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCScheduleP8.td | 170 (instregex "^F(N)?M(ADD|SUB)(S)?(_rec)?$"), 171 (instregex "^XS(N)?M(ADD|SUB)(A|M)(D|S)P$"), 173 (instregex "^(F|XS)(ABS|CPSGN|ADD|MUL|NABS|RE|NEG|SUB|SEL|RSQRTE)(D|S)?(P)?(s)?(_rec)?$"), 182 (instregex "^XV(N)?M(ADD|SUB)(A|M)SP$"), 192 (instregex "^XV(N)?(M)?(RSQRTE|CPSGN|SUB|ADD|ABS|UL|NEG|RE)(A|M)?DP$"), 275 (instregex "^V(ADD|SUB)(S|U)(B|H|W|D)(M|S)$"), 288 (instregex "^V(ADD|SUB)(E)?(C)?UQ(M)?$"), 314 (instregex "^D(ADD|SUB|IEX|QUA|RRND|RINTX|RINTN|CTDP|DEDPD|ENBCD)(_rec)?$"), 324 def : InstRW<[P8_DFU_17C, P8_ISSUE_VSX], (instregex "^D(ADD|SUB|QUA)Q(_rec)?$")>;
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/freebsd/contrib/ntp/include/ |
H A D | ascii.h | 67 #define SUB 26 macro
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelDAGToDAG.cpp | 259 ISD::SUB, DL, VT, {CurDAG->getConstant(0, DL, VT), C}); in selectVecAddAsVecSubIfProfitable() 261 SDValue NewNode = CurDAG->getNode(ISD::SUB, DL, VT, X, NegC); in selectVecAddAsVecSubIfProfitable()
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/freebsd/contrib/byacc/test/ |
H A D | btyacc_demo.y | 22 enum Operator { ADD, SUB, MUL, MOD, DIV, DEREF }; enumerator 173 | expr '-' expr($e) { $$ = build_expr($1, SUB, $3); }
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