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Searched refs:imm16 (Results 1 – 25 of 28) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF1.td377 (BT32 (FCMPZHS_S sFPR32Op:$rs1), bb:$imm16)>;
381 (BF32 (FCMPZHS_S sFPR32Op:$rs1), bb:$imm16)>;
385 (BT32 (FCMPZLS_S sFPR32Op:$rs1), bb:$imm16)>;
389 (BF32 (FCMPZLS_S sFPR32Op:$rs1), bb:$imm16)>;
393 (BT32 (FCMPZNE_S sFPR32Op:$rs1), bb:$imm16)>;
397 (BF32 (FCMPZNE_S sFPR32Op:$rs1), bb:$imm16)>;
401 (BT32 (FCMPZUO_S sFPR32Op:$rs1), bb:$imm16)>;
405 (BF32 (FCMPZUO_S sFPR32Op:$rs1), bb:$imm16)>;
409 (BT32 (FCMPZHS_S sFPR32Op:$rs1), bb:$imm16)>;
413 (BF32 (FCMPZHS_S sFPR32Op:$rs1), bb:$imm16)>;
[all …]
H A DCSKYInstrInfoF2.td397 (BT32 (f2FCMPHSZ_S FPR32Op:$rs1), bb:$imm16)>;
403 (BT32 (f2FCMPLTZ_S FPR32Op:$rs1), bb:$imm16)>;
409 (BT32 (f2FCMPLSZ_S FPR32Op:$rs1), bb:$imm16)>;
415 (BT32 (f2FCMPHZ_S FPR32Op:$rs1), bb:$imm16)>;
421 (BT32 (f2FCMPNEZ_S FPR32Op:$rs1), bb:$imm16)>;
427 (BT32 (f2FCMPUOZ_S FPR32Op:$rs1), bb:$imm16)>;
433 (BT32 (f2FCMPHSZ_S FPR32Op:$rs1), bb:$imm16)>;
439 (BT32 (f2FCMPLTZ_S FPR32Op:$rs1), bb:$imm16)>;
445 (BT32 (f2FCMPLSZ_S FPR32Op:$rs1), bb:$imm16)>;
451 (BT32 (f2FCMPHZ_S FPR32Op:$rs1), bb:$imm16)>;
[all …]
H A DCSKYInstrInfo.td740 "cmplei32\t$rx, $imm16", []>;
805 def BR32 : I_16_L<0x0, (outs), (ins br_symbol:$imm16), "br32\t$imm16",
806 [(br bb:$imm16)]>;
809 "bt32\t$imm16", [(brcond CARRY:$ca, bb:$imm16)]>, Requires<[iHasE2]>;
833 (ins constpool_symbol:$imm16), "jsri32\t$imm16", []>;
837 (outs GPR:$rx_u), (ins GPR:$rx, br_symbol:$imm16), "bnezad32\t$rx, $imm16", []> {
839 bits<16> imm16;
842 let Inst{15 - 0} = imm16;
1193 (BT32 CARRY:$ca, bb:$imm16)>;
1208 bb:$imm16)>;
[all …]
H A DCSKYInstrFormats.td85 bits<16> imm16;
88 let Inst{15 - 0} = imm16;
98 bits<16> imm16;
101 let Inst{15 - 0} = imm16;
113 bits<16> imm16;
116 let Inst{15 - 0} = imm16;
123 bits<16> imm16;
135 bits<16> imm16;
172 (ins GPR:$rx, operand:$imm16), !strconcat(op, "\t$rx, $imm16"), []> {
173 bits<16> imm16;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrFormats.td435 bits<16> imm16;
440 let Inst{26-21} = imm16{10-5};
444 let Inst{4-0} = imm16{4-0};
486 bits<16> imm16;
492 let Inst{26-21} = imm16{10-5};
497 let Inst{4-0} = imm16{4-0};
511 bits<16> imm16;
517 let Inst{26-21} = imm16{10-5};
522 let Inst{4-0} = imm16{4-0};
588 bits<16> imm16;
[all …]
H A DMips16InstrInfo.td151 FEXT_I16<eop, (outs), (ins brtarget:$imm16),
152 !strconcat(asmstr, "\t$imm16"),[], itin>;
165 FEXT_I816_ins_base<_func, asmstr, "\t$imm16", itin>;
193 FEXT_RI16<_op, (outs CPU16Regs:$rx), (ins simm16:$imm16),
198 FEXT_RI16_ins_base<_op, asmstr, "\t$rx, $imm16", itin>;
207 FEXT_RI16R_ins_base<_op, asmstr, "\t$rx, $imm16", itin>;
215 !strconcat(asmstr, "\t$rx, $imm16"), [], itin>;
220 !strconcat(asmstr, "\t$rx, $imm16"), [], itin>;
1368 Mips16Pat<(OpNode bb:$imm16), (I bb:$imm16)> {
1406 Mips16Pat<(cond_op CPU16Regs:$rx, imm_type:$imm16),
[all …]
H A DMipsInstrFormats.td206 bits<16> imm16;
213 let Inst{15-0} = imm16;
234 bits<16> imm16;
241 let Inst{15-0} = imm16;
317 bits<16> imm16;
324 let Inst{15-0} = imm16;
382 bits<16> imm16;
389 let Inst{15-0} = imm16;
503 bits<16> imm16;
510 let Inst{15-0} = imm16;
H A DMicroMipsInstrFormats.td314 bits<16> imm16;
321 let Inst{15-0} = imm16;
327 bits<16> imm16;
334 let Inst{15-0} = imm16;
339 bits<16> imm16;
346 let Inst{15-0} = imm16;
693 bits<16> imm16;
700 let Inst{15-0} = imm16;
H A DMicroMips32r6InstrFormats.td160 bits<16> imm16;
167 let Inst{15-0} = imm16;
405 bits<16> imm16;
412 let Inst{15-0} = imm16;
H A DMipsInstrInfo.td1334 InstSE<(outs RO:$rt), (ins RO:$rs, Od:$imm16),
1335 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1336 [(set RO:$rt, (OpNode RO:$rs, imm_type:$imm16))],
1379 InstSE<(outs RO:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"),
1529 InstSE<(outs GPR32Opnd:$rt), (ins RO:$rs, Od:$imm16),
1530 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1531 [(set GPR32Opnd:$rt, (cond_op RO:$rs, imm_type:$imm16))],
1675 InstSE<(outs), (ins RO:$rs, simm16:$imm16),
1676 !strconcat(opstr, "\t$rs, $imm16"), [], itin, FrmOther, opstr>;
H A DMips64InstrInfo.td501 InstSE<(outs RO:$rt, uimm16:$imm16), (ins),
502 !strconcat(asmstr, "\t$rt, $imm16"), [], itin, FrmFR>;
908 def : MipsPat<(i64 (sext (i32 (add GPR32:$src, immSExt16:$imm16)))),
910 (ADDiu GPR32:$src, immSExt16:$imm16), sub_32)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td409 "mov\t$imm16, $Rd",
410 [(set GPR:$Rd, i32hi16:$imm16)]>;
412 def : InstAlias<"mov $imm16, $dst", (ADD_I_LO GPR:$dst, R0, i32lo16z:$imm16)>;
413 def : InstAlias<"mov $imm16, $dst", (ADD_I_HI GPR:$dst, R0, i32hi16:$imm16)>;
414 def : InstAlias<"mov $imm16, $dst",
415 (AND_I_LO GPR:$dst, R1, i32lo16and:$imm16)>;
416 def : InstAlias<"mov $imm16, $dst",
506 let imm16 = src{15-0};
625 let imm16 = dst{15-0};
740 let imm16 = -4;
[all …]
H A DLanaiInstrFormats.td94 bits<16> imm16;
102 let Inst{15 - 0} = imm16;
202 bits<16> imm16;
213 let Inst{15 - 0} = imm16;
359 bits<16> imm16;
366 let Inst{15 - 0} = imm16;
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstr64Bit.td347 def R : F2_4<0, 1, (outs), (ins bprtarget16:$imm16, RegCCOp:$rcond, I64Regs:$rs1),
348 "br$rcond $rs1, $imm16", CCPattern>;
349 def RA : F2_4<1, 1, (outs), (ins bprtarget16:$imm16, RegCCOp:$rcond, I64Regs:$rs1),
350 "br$rcond,a $rs1, $imm16", []>;
352 "br$rcond,pn $rs1, $imm16", []>;
354 "br$rcond,a,pn $rs1, $imm16", []>;
358 def : InstAlias<!strconcat(OpcStr, ",pt $rs1, $imm16"),
359 (NAPT I64Regs:$rs1, bprtarget16:$imm16), 0>;
360 def : InstAlias<!strconcat(OpcStr, ",a,pt $rs1, $imm16"),
361 (APT I64Regs:$rs1, bprtarget16:$imm16), 0>;
[all …]
H A DSparcInstrFormats.td89 bits<16> imm16;
99 let Inst{21-20} = imm16{15-14};
102 let Inst{13-0} = imm16{13-0};
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.td635 "$rd, $rj, $imm16">;
651 "$rj, $rd, $imm16"> {
808 (ins GPR:$rj, simm16_lsl2:$imm16), "$rd, $rj, $imm16">;
2160 def : InstAlias<"bgt $rj, $rd, $imm16",
2162 def : InstAlias<"bgtu $rj, $rd, $imm16",
2164 def : InstAlias<"ble $rj, $rd, $imm16",
2166 def : InstAlias<"bleu $rj, $rd, $imm16",
2168 def : InstAlias<"bltz $rd, $imm16",
2170 def : InstAlias<"bgtz $rj, $imm16",
2172 def : InstAlias<"blez $rj, $imm16",
[all …]
H A DLoongArchInstrFormats.td191 bits<16> imm16;
196 let Inst{25-10} = imm16;
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrFormats.td95 bits<16> imm16;
97 let Inst{23-8} = imm16;
H A DXtensaInstrInfo.td238 let imm16 = label;
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS64/
H A DEmulateInstructionMIPS64.cpp1069 const uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_DADDiu() local
1070 int64_t imm = SignedBits(imm16, 15, 0); in Emulate_DADDiu()
1130 uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_SD() local
1131 uint64_t imm = SignedBits(imm16, 15, 0); in Emulate_SD()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.cpp1179 const uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_ADDiu() local
1180 int64_t imm = SignedBits(imm16, 15, 0); in Emulate_ADDiu()
1227 uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_SW() local
1228 uint32_t imm = SignedBits(imm16, 15, 0); in Emulate_SW()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1491 uint16_t imm16; in readImmediate() local
1509 if (consume(insn, imm16)) in readImmediate()
1511 insn->immediates[insn->numImmediatesConsumed] = imm16; in readImmediate()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.td216 def imm16 : Operand<i16> { let EncoderMethod = "encodeImm<AVR::fixup_16, 2>"; }
1292 (ins imm16
1513 (ins imm16
1907 : $src, imm16
1957 : $src, imm16
1994 : $src, imm16
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td2918 def t2UDF : T2XI<(outs), (ins imm0_65535:$imm16), IIC_Br, "udf.w\t$imm16",
2919 [(int_arm_undefined imm0_65535:$imm16)]> {
2920 bits<16> imm16;
2924 let Inst{19-16} = imm16{15-12};
2927 let Inst{11-0} = imm16{11-0};
3429 (t2PKHTB rGPR:$src1, rGPR:$src2, imm16:$sh)>,
4299 def t2HVC : T2XI <(outs), (ins imm0_65535:$imm16), IIC_Br, "hvc.w\t$imm16", []>,
4301 bits<16> imm16;
4303 let Inst{19-16} = imm16{15-12};
4305 let Inst{11-0} = imm16{11-0};
[all …]
H A DARMInstrInfo.td888 /// imm16 predicate - Immediate is exactly 16.
890 def imm16 : Operand<i32>, ImmLeaf<i32, [{ return Imm == 16; }]> {
2351 def UDF : AInoP<(outs), (ins imm0_65535:$imm16), MiscFrm, NoItinerary,
2352 "udf", "\t$imm16", [(int_arm_undefined imm0_65535:$imm16)]> {
2353 bits<16> imm16;
2357 let Inst{19-8} = imm16{15-4};
2359 let Inst{3-0} = imm16{3-0};
4836 (srl GPRnopc:$src2, imm16:$sh)),
4837 (PKHTB GPRnopc:$src1, GPRnopc:$src2, imm16:$sh)>;

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