Searched refs:UvdBootLevel (Results 1 – 18 of 18) sorted by relevance
/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
H A D | smumgr.h | 50 UvdBootLevel, enumerator
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H A D | smu7_fusion.h | 242 uint8_t UvdBootLevel; member
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H A D | smu7_discrete.h | 339 uint8_t UvdBootLevel; member
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H A D | smu73_discrete.h | 265 uint8_t UvdBootLevel; member
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H A D | smu72_discrete.h | 281 uint8_t UvdBootLevel; member
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H A D | smu74_discrete.h | 299 uint8_t UvdBootLevel; member
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H A D | smu75_discrete.h | 305 uint8_t UvdBootLevel; member
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
H A D | amdgpu_vegam_smumgr.c | 343 smu_data->smc_state_table.UvdBootLevel = 0; in vegam_update_uvd_smc_table() 345 smu_data->smc_state_table.UvdBootLevel = in vegam_update_uvd_smc_table() 348 UvdBootLevel); in vegam_update_uvd_smc_table() 354 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in vegam_update_uvd_smc_table() 364 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in vegam_update_uvd_smc_table() 1323 table->UvdBootLevel = 0; in vegam_populate_smc_uvd_level() 2188 case UvdBootLevel: in vegam_get_offsetof() 2189 return offsetof(SMU75_Discrete_DpmTable, UvdBootLevel); in vegam_get_offsetof()
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H A D | amdgpu_fiji_smumgr.c | 1572 table->UvdBootLevel = 0; in fiji_populate_smc_uvd_level() 2331 case UvdBootLevel: in fiji_get_offsetof() 2332 return offsetof(SMU73_Discrete_DpmTable, UvdBootLevel); in fiji_get_offsetof() 2377 smu_data->smc_state_table.UvdBootLevel = 0; in fiji_update_uvd_smc_table() 2379 smu_data->smc_state_table.UvdBootLevel = in fiji_update_uvd_smc_table() 2382 UvdBootLevel); in fiji_update_uvd_smc_table() 2388 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in fiji_update_uvd_smc_table() 2398 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in fiji_update_uvd_smc_table()
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H A D | amdgpu_polaris10_smumgr.c | 1411 table->UvdBootLevel = 0; in polaris10_populate_smc_uvd_level() 2189 smu_data->smc_state_table.UvdBootLevel = 0; in polaris10_update_uvd_smc_table() 2191 smu_data->smc_state_table.UvdBootLevel = in polaris10_update_uvd_smc_table() 2194 UvdBootLevel); in polaris10_update_uvd_smc_table() 2200 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in polaris10_update_uvd_smc_table() 2210 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in polaris10_update_uvd_smc_table() 2349 case UvdBootLevel: in polaris10_get_offsetof() 2350 return offsetof(SMU74_Discrete_DpmTable, UvdBootLevel); in polaris10_get_offsetof()
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H A D | amdgpu_tonga_smumgr.c | 1326 table->UvdBootLevel = 0; in tonga_populate_smc_uvd_level() 2642 case UvdBootLevel: in tonga_get_offsetof() 2643 return offsetof(SMU72_Discrete_DpmTable, UvdBootLevel); in tonga_get_offsetof() 2688 smu_data->smc_state_table.UvdBootLevel = 0; in tonga_update_uvd_smc_table() 2690 smu_data->smc_state_table.UvdBootLevel = in tonga_update_uvd_smc_table() 2693 offsetof(SMU72_Discrete_DpmTable, UvdBootLevel); in tonga_update_uvd_smc_table() 2699 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in tonga_update_uvd_smc_table() 2710 (uint32_t)(1 << smu_data->smc_state_table.UvdBootLevel)); in tonga_update_uvd_smc_table()
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H A D | amdgpu_ci_smumgr.c | 2015 table->UvdBootLevel = 0; in ci_init_smc_table() 2874 smu_data->smc_state_table.UvdBootLevel = 0; in ci_update_uvd_smc_table() 2876 smu_data->smc_state_table.UvdBootLevel = uvd_table->count - 1; in ci_update_uvd_smc_table() 2879 UvdBootLevel, smu_data->smc_state_table.UvdBootLevel); in ci_update_uvd_smc_table()
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/netbsd/sys/external/bsd/drm2/dist/drm/radeon/ |
H A D | smu7_fusion.h | 242 uint8_t UvdBootLevel; member
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H A D | smu7_discrete.h | 338 uint8_t UvdBootLevel; member
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H A D | radeon_ci_dpm.c | 3628 table->UvdBootLevel = 0; in ci_init_smc_table() 4091 pi->smc_state_table.UvdBootLevel = 0; in ci_update_uvd_dpm() 4093 pi->smc_state_table.UvdBootLevel = in ci_update_uvd_dpm() 4098 tmp |= UvdBootLevel(pi->smc_state_table.UvdBootLevel); in ci_update_uvd_dpm()
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H A D | cikd.h | 53 # define UvdBootLevel(x) ((x) << 24) macro
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H A D | radeon_kv_dpm.c | 1451 offsetof(SMU7_Fusion_DpmTable, UvdBootLevel), in kv_update_uvd_dpm()
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
H A D | amdgpu_kv_dpm.c | 1520 offsetof(SMU7_Fusion_DpmTable, UvdBootLevel), in kv_update_uvd_dpm()
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