Searched refs:kiq (Results 1 – 15 of 15) sorted by relevance
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
H A D | amdgpu_gfx.c | 299 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init_ring() local 336 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_fini() local 338 amdgpu_bo_free_kernel(&kiq->eop_obj, &kiq->eop_gpu_addr, NULL); in amdgpu_gfx_kiq_fini() 346 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init() local 375 ring = &adev->gfx.kiq.ring; in amdgpu_gfx_mqd_sw_init() 471 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_disable_kcq() local 475 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_gfx_disable_kcq() 491 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_enable_kcq() local 496 if (!kiq->pmf || !kiq->pmf->kiq_map_queues || !kiq->pmf->kiq_set_resources) in amdgpu_gfx_enable_kcq() 673 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_kiq_rreg() local [all …]
|
H A D | amdgpu_virt.c | 57 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_virt_kiq_reg_write_reg_wait() local 58 struct amdgpu_ring *ring = &kiq->ring; in amdgpu_virt_kiq_reg_write_reg_wait() 63 spin_lock_irqsave(&kiq->ring_lock, flags); in amdgpu_virt_kiq_reg_write_reg_wait() 69 spin_unlock_irqrestore(&kiq->ring_lock, flags); in amdgpu_virt_kiq_reg_write_reg_wait()
|
H A D | amdgpu_gmc_v10_0.c | 422 struct amdgpu_ring *ring = &adev->gfx.kiq.ring; in gmc_v10_0_flush_gpu_tlb_pasid() 423 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gmc_v10_0_flush_gpu_tlb_pasid() local 426 spin_lock(&adev->gfx.kiq.ring_lock); in gmc_v10_0_flush_gpu_tlb_pasid() 428 amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size + 8); in gmc_v10_0_flush_gpu_tlb_pasid() 429 kiq->pmf->kiq_invalidate_tlbs(ring, in gmc_v10_0_flush_gpu_tlb_pasid() 433 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v10_0_flush_gpu_tlb_pasid()
|
H A D | amdgpu_gfx_v10_0.c | 1306 struct amdgpu_kiq *kiq; in gfx_v10_0_sw_init() local 1417 kiq = &adev->gfx.kiq; in gfx_v10_0_sw_init() 1418 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v10_0_sw_init() 3157 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v10_0_kiq_enable_kgq() local 3161 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in gfx_v10_0_kiq_enable_kgq() 3536 ring = &adev->gfx.kiq.ring; in gfx_v10_0_kiq_resume() 3780 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v10_0_kiq_disable_kgq() local 3784 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v10_0_kiq_disable_kgq() 4640 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v10_0_ring_preempt_ib() local 4643 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v10_0_ring_preempt_ib() [all …]
|
H A D | amdgpu_gmc_v9_0.c | 495 if (adev->gfx.kiq.ring.sched.ready && in gmc_v9_0_flush_gpu_tlb() 578 struct amdgpu_ring *ring = &adev->gfx.kiq.ring; in gmc_v9_0_flush_gpu_tlb_pasid() 579 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gmc_v9_0_flush_gpu_tlb_pasid() local 585 spin_lock(&adev->gfx.kiq.ring_lock); in gmc_v9_0_flush_gpu_tlb_pasid() 587 amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size + 8); in gmc_v9_0_flush_gpu_tlb_pasid() 588 kiq->pmf->kiq_invalidate_tlbs(ring, in gmc_v9_0_flush_gpu_tlb_pasid() 592 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v9_0_flush_gpu_tlb_pasid()
|
H A D | amdgpu_amdkfd_gfx_v9.c | 337 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_gfx_v9_hiq_mqd_load() 352 spin_lock(&adev->gfx.kiq.ring_lock); in kgd_gfx_v9_hiq_mqd_load() 379 spin_unlock(&adev->gfx.kiq.ring_lock); in kgd_gfx_v9_hiq_mqd_load()
|
H A D | amdgpu_amdkfd_gfx_v10.c | 349 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_hiq_mqd_load() 364 spin_lock(&adev->gfx.kiq.ring_lock); in kgd_hiq_mqd_load() 391 spin_unlock(&adev->gfx.kiq.ring_lock); in kgd_hiq_mqd_load()
|
H A D | amdgpu_doorbell.h | 49 uint32_t kiq; member
|
H A D | amdgpu_vega10_reg_init.c | 65 adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; in vega10_doorbell_index_init()
|
H A D | amdgpu_vega20_reg_init.c | 65 adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; in vega20_doorbell_index_init()
|
H A D | amdgpu_gfx_v9_0.c | 2171 struct amdgpu_kiq *kiq; in gfx_v9_0_sw_init() local 2283 kiq = &adev->gfx.kiq; in gfx_v9_0_sw_init() 2284 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v9_0_sw_init() 3257 adev->gfx.kiq.ring.sched.ready = false; in gfx_v9_0_cp_compute_enable() 3539 (adev->doorbell_index.kiq * 2) << 2); in gfx_v9_0_kiq_init_register() 3686 ring = &adev->gfx.kiq.ring; in gfx_v9_0_kiq_resume() 3862 adev->gfx.kiq.ring.pipe, in gfx_v9_0_hw_fini() 3863 adev->gfx.kiq.ring.queue, 0); in gfx_v9_0_hw_fini() 5307 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v9_0_ring_emit_rreg() local 5316 kiq->reg_val_offs * 4)); in gfx_v9_0_ring_emit_rreg() [all …]
|
H A D | amdgpu_gfx_v8_0.c | 1929 struct amdgpu_kiq *kiq; in gfx_v8_0_sw_init() local 2050 kiq = &adev->gfx.kiq; in gfx_v8_0_sw_init() 2051 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v8_0_sw_init() 2080 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring); in gfx_v8_0_sw_fini() 4330 adev->gfx.kiq.ring.sched.ready = false; in gfx_v8_0_cp_compute_enable() 4352 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v8_0_kiq_kcq_enable() 4700 ring = &adev->gfx.kiq.ring; in gfx_v8_0_kiq_resume() 4763 ring = &adev->gfx.kiq.ring; in gfx_v8_0_cp_test_all_rings() 6460 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v8_0_ring_emit_rreg() local 6469 kiq->reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg() [all …]
|
H A D | amdgpu_gfx.h | 249 struct amdgpu_kiq kiq; member
|
H A D | amdgpu_nv.c | 599 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in nv_init_doorbell_index()
|
H A D | amdgpu_vi.c | 1873 adev->doorbell_index.kiq = AMDGPU_DOORBELL_KIQ; in legacy_doorbell_index_init()
|