Home
last modified time | relevance | path

Searched refs:mmRLC_GPM_UCODE_ADDR (Results 1 – 15 of 15) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_psp_v10_0.c288 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_ADDR); in psp_v10_0_sram_map()
H A Damdgpu_psp_v12_0.c392 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_ADDR); in psp_v12_0_sram_map()
H A Damdgpu_psp_v3_1.c468 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_ADDR); in psp_v3_1_sram_map()
H A Damdgpu_psp_v11_0.c622 *sram_addr_reg_offset = SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_UCODE_ADDR); in psp_v11_0_sram_map()
H A Damdgpu_gfx_v7_0.c3565 WREG32(mmRLC_GPM_UCODE_ADDR, 0); in gfx_v7_0_rlc_resume()
3568 WREG32(mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); in gfx_v7_0_rlc_resume()
H A Damdgpu_gfx_v10_0.c1878 WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, in gfx_v10_0_rlc_load_microcode()
1885 WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); in gfx_v10_0_rlc_load_microcode()
H A Damdgpu_gfx_v9_0.c2987 WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, in gfx_v9_0_rlc_load_microcode()
2991 WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); in gfx_v9_0_rlc_load_microcode()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1268 #define mmRLC_GPM_UCODE_ADDR 0x30e2 macro
H A Dgfx_7_2_d.h1281 #define mmRLC_GPM_UCODE_ADDR 0x30e2 macro
H A Dgfx_8_0_d.h1376 #define mmRLC_GPM_UCODE_ADDR 0xf83c macro
H A Dgfx_8_1_d.h1379 #define mmRLC_GPM_UCODE_ADDR 0xf83c macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6754 #define mmRLC_GPM_UCODE_ADDR macro
H A Dgc_9_2_1_offset.h7016 #define mmRLC_GPM_UCODE_ADDR macro
H A Dgc_9_1_offset.h6978 #define mmRLC_GPM_UCODE_ADDR macro
H A Dgc_10_1_0_offset.h10430 #define mmRLC_GPM_UCODE_ADDR macro