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Searched refs:ixSQ_WAVE_TTMP3 (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h100 #define ixSQ_WAVE_TTMP3 0x0273 macro
H A Dgfx_7_0_d.h1928 #define ixSQ_WAVE_TTMP3 0x273 macro
H A Dgfx_7_2_d.h1949 #define ixSQ_WAVE_TTMP3 0x273 macro
H A Dgfx_8_0_d.h2148 #define ixSQ_WAVE_TTMP3 0x273 macro
H A Dgfx_8_1_d.h2116 #define ixSQ_WAVE_TTMP3 0x273 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7114 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_9_2_1_offset.h7361 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_9_4_2_offset.h7661 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_9_1_offset.h7322 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_9_4_3_offset.h7424 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_10_1_0_offset.h11197 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_11_0_0_offset.h11657 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_11_0_3_offset.h12075 #define ixSQ_WAVE_TTMP3 … macro
H A Dgc_10_3_0_offset.h13446 #define ixSQ_WAVE_TTMP3 … macro