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Searched refs:jt_size (Results 1 – 13 of 13) sorted by relevance

/openbsd/sys/dev/pci/drm/radeon/
H A Dradeon_ucode.h187 uint32_t jt_size; /* size of jt */ member
206 uint32_t jt_size; /* size of jt */ member
H A Dradeon_ucode.c100 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size)); in radeon_ucode_print_gfx_hdr()
150 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size)); in radeon_ucode_print_sdma_hdr()
H A Dcik.c6435 table_size = le32_to_cpu(hdr->jt_size); in cik_init_cp_pg_table()
6441 table_size = le32_to_cpu(hdr->jt_size); in cik_init_cp_pg_table()
6447 table_size = le32_to_cpu(hdr->jt_size); in cik_init_cp_pg_table()
6453 table_size = le32_to_cpu(hdr->jt_size); in cik_init_cp_pg_table()
6459 table_size = le32_to_cpu(hdr->jt_size); in cik_init_cp_pg_table()
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_ucode.h172 uint32_t jt_size; /* size of jt */ member
217 uint32_t jt_size; /* size of jt */ member
296 uint32_t jt_size; /* size of jt */ member
H A Damdgpu_rlc.c209 table_size = le32_to_cpu(hdr->jt_size); in amdgpu_gfx_rlc_setup_cp_table()
217 table_size = le32_to_cpu(hdr->jt_size); in amdgpu_gfx_rlc_setup_cp_table()
225 table_size = le32_to_cpu(hdr->jt_size); in amdgpu_gfx_rlc_setup_cp_table()
233 table_size = le32_to_cpu(hdr->jt_size); in amdgpu_gfx_rlc_setup_cp_table()
241 table_size = le32_to_cpu(hdr->jt_size); in amdgpu_gfx_rlc_setup_cp_table()
H A Damdgpu_ucode.c117 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size)); in amdgpu_ucode_print_gfx_hdr()
169 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(rlc_hdr->jt_size)); in amdgpu_ucode_print_rlc_hdr()
309 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size)); in amdgpu_ucode_print_sdma_hdr()
791 le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()
797 ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()
993 memcpy(dst_addr, src_addr, le32_to_cpu(header->jt_size) * 4); in amdgpu_ucode_patch_jt()
1057 fw_offset += ALIGN(le32_to_cpu(cp_hdr->jt_size) << 2, PAGE_SIZE); in amdgpu_ucode_init_bo()
H A Damdgpu_gfx.c1155 le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_gfx_cp_init_microcode()
1161 fw_size = le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_gfx_cp_init_microcode()
1172 le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_gfx_cp_init_microcode()
1178 fw_size = le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_gfx_cp_init_microcode()
H A Damdgpu_cgs.c230 data_size = le32_to_cpu(header->jt_size) << 2; in amdgpu_cgs_get_firmware_info()
H A Dgfx_v10_0.c5389 cp_hdr->jt_size * 4; in gfx_v10_0_rlc_backdoor_autoload_copy_gfx_ucode()
5418 sdma_hdr->jt_size * 4); in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()
5426 sdma_hdr->jt_size * 4); in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()
5753 for (i = 0; i < pfp_hdr->jt_size; i++) in gfx_v10_0_cp_gfx_load_pfp_microcode()
5830 for (i = 0; i < ce_hdr->jt_size; i++) in gfx_v10_0_cp_gfx_load_ce_microcode()
5907 for (i = 0; i < me_hdr->jt_size; i++) in gfx_v10_0_cp_gfx_load_me_microcode()
6284 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v10_0_cp_compute_load_microcode()
H A Dgfx_v11_0.c1173 cp_hdr->jt_size * 4; in gfx_v11_0_rlc_backdoor_autoload_copy_gfx_ucode()
2695 for (i = 0; i < pfp_hdr->jt_size; i++) in gfx_v11_0_cp_gfx_load_pfp_microcode()
2913 for (i = 0; i < me_hdr->jt_size; i++) in gfx_v11_0_cp_gfx_load_me_microcode()
3425 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v11_0_cp_compute_load_microcode()
H A Dgfx_v9_4_3.c1432 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v9_4_3_xcc_cp_compute_load_microcode()
H A Dgfx_v8_0.c1176 ALIGN(le32_to_cpu(cp_hdr->jt_size) << 2, PAGE_SIZE); in gfx_v8_0_init_microcode()
H A Dgfx_v9_0.c3209 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v9_0_cp_compute_load_microcode()