Home
last modified time | relevance | path

Searched refs:max_shader_engines (Results 1 – 25 of 29) sorted by relevance

12

/openbsd/sys/dev/pci/drm/radeon/
H A Dradeon_kms.c365 rdev->config.cik.max_shader_engines; in radeon_info_ioctl()
368 rdev->config.si.max_shader_engines; in radeon_info_ioctl()
371 rdev->config.cayman.max_shader_engines; in radeon_info_ioctl()
459 *value = rdev->config.cik.max_shader_engines; in radeon_info_ioctl()
461 *value = rdev->config.si.max_shader_engines; in radeon_info_ioctl()
463 *value = rdev->config.cayman.max_shader_engines; in radeon_info_ioctl()
H A Dni.c893 rdev->config.cayman.max_shader_engines = 2; in cayman_gpu_init()
917 rdev->config.cayman.max_shader_engines = 1; in cayman_gpu_init()
1079 for (i = (rdev->config.cayman.max_shader_engines - 1); i >= 0; i--) { in cayman_gpu_init()
1091 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()
1095 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()
1099 for (i = 0; i < rdev->config.cayman.max_shader_engines; i++) { in cayman_gpu_init()
1138 rdev->config.cayman.max_shader_engines, in cayman_gpu_init()
H A Dsi.c3099 rdev->config.si.max_shader_engines = 2; in si_gpu_init()
3116 rdev->config.si.max_shader_engines = 2; in si_gpu_init()
3134 rdev->config.si.max_shader_engines = 1; in si_gpu_init()
3151 rdev->config.si.max_shader_engines = 1; in si_gpu_init()
3168 rdev->config.si.max_shader_engines = 1; in si_gpu_init()
3287 si_setup_rb(rdev, rdev->config.si.max_shader_engines, in si_gpu_init()
3291 si_setup_spi(rdev, rdev->config.si.max_shader_engines, in si_gpu_init()
3296 for (i = 0; i < rdev->config.si.max_shader_engines; i++) { in si_gpu_init()
5327 for (i = 0; i < rdev->config.si.max_shader_engines; i++) { in si_init_ao_cu_mask()
H A Dcik.c2331 rdev->config.cik.max_shader_engines; in cik_tiling_mode_table_init()
3178 rdev->config.cik.max_shader_engines = 2; in cik_gpu_init()
3195 rdev->config.cik.max_shader_engines = 4; in cik_gpu_init()
3212 rdev->config.cik.max_shader_engines = 1; in cik_gpu_init()
3231 rdev->config.cik.max_shader_engines = 1; in cik_gpu_init()
3335 cik_setup_rb(rdev, rdev->config.cik.max_shader_engines, in cik_gpu_init()
3340 for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { in cik_gpu_init()
5786 for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { in cik_wait_for_rlc_serdes()
6553 for (i = 0; i < rdev->config.cik.max_shader_engines; i++) { in cik_init_ao_cu_mask()
H A Dradeon.h2100 unsigned max_shader_engines; member
2139 unsigned max_shader_engines; member
2170 unsigned max_shader_engines; member
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c791 adev->gfx.config.max_shader_engines = gfx_info->v24.max_shader_engines; in amdgpu_atomfirmware_get_gfx_info()
809 adev->gfx.config.max_shader_engines = gfx_info->v27.max_shader_engines; in amdgpu_atomfirmware_get_gfx_info()
830 adev->gfx.config.max_shader_engines = gfx_info->v30.max_shader_engines; in amdgpu_atomfirmware_get_gfx_info()
H A Dgfx_v6_0.c1460 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v6_0_setup_rb()
1475 adev->gfx.config.max_shader_engines, 16); in gfx_v6_0_setup_rb()
1488 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v6_0_setup_rb()
1536 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v6_0_setup_spi()
1572 adev->gfx.config.max_shader_engines = 2; in gfx_v6_0_constants_init()
1589 adev->gfx.config.max_shader_engines = 2; in gfx_v6_0_constants_init()
1606 adev->gfx.config.max_shader_engines = 1; in gfx_v6_0_constants_init()
1623 adev->gfx.config.max_shader_engines = 1; in gfx_v6_0_constants_init()
1640 adev->gfx.config.max_shader_engines = 1; in gfx_v6_0_constants_init()
1694 if (adev->gfx.config.max_shader_engines == 2) in gfx_v6_0_constants_init()
[all …]
H A Dgfx_v9_4_2.c433 for (se = 0; se < adev->gfx.config.max_shader_engines; se++) { in gfx_v9_4_2_log_wave_assignment()
465 for (se = 0; se < adev->gfx.config.max_shader_engines; se++) in gfx_v9_4_2_wait_for_waves_assigned()
493 int wb_size = adev->gfx.config.max_shader_engines * in gfx_v9_4_2_do_sgprs_init()
637 int wb_size = adev->gfx.config.max_shader_engines * in gfx_v9_4_2_do_vgprs_init()
1798 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_4_2_enable_watchdog_timer()
1864 for (se_idx = 0; se_idx < adev->gfx.config.max_shader_engines; in gfx_v9_4_2_query_sq_timeout_status()
1897 for (se_idx = 0; se_idx < adev->gfx.config.max_shader_engines; in gfx_v9_4_2_reset_sq_timeout_status()
H A Dgfx_v7_0.c1640 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v7_0_write_harvested_raster_configs()
1761 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v7_0_setup_rb()
1775 adev->gfx.config.max_shader_engines, 16); in gfx_v7_0_setup_rb()
1790 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v7_0_setup_rb()
3300 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v7_0_wait_for_rlc_serdes()
4217 adev->gfx.config.max_shader_engines = 2; in gfx_v7_0_gpu_early_init()
4234 adev->gfx.config.max_shader_engines = 4; in gfx_v7_0_gpu_early_init()
4251 adev->gfx.config.max_shader_engines = 1; in gfx_v7_0_gpu_early_init()
4270 adev->gfx.config.max_shader_engines = 1; in gfx_v7_0_gpu_early_init()
5112 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v7_0_get_cu_info()
H A Dgfx_v8_0.c1662 adev->gfx.config.max_shader_engines = 1; in gfx_v8_0_gpu_early_init()
1679 adev->gfx.config.max_shader_engines = 4; in gfx_v8_0_gpu_early_init()
1726 adev->gfx.config.max_shader_engines = 4; in gfx_v8_0_gpu_early_init()
1743 adev->gfx.config.max_shader_engines = 1; in gfx_v8_0_gpu_early_init()
1760 adev->gfx.config.max_shader_engines = 1; in gfx_v8_0_gpu_early_init()
1777 adev->gfx.config.max_shader_engines = 2; in gfx_v8_0_gpu_early_init()
3603 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v8_0_setup_rb()
3617 adev->gfx.config.max_shader_engines, 16); in gfx_v8_0_setup_rb()
3632 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v8_0_setup_rb()
3821 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v8_0_wait_for_rlc_serdes()
[all …]
H A Damdgpu_gfx.h188 unsigned max_shader_engines; member
H A Dgfx_v9_4_3.c1123 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_4_3_xcc_wait_for_rlc_serdes()
3952 for (se_idx = 0; se_idx < adev->gfx.config.max_shader_engines; se_idx++) { in gfx_v9_4_3_inst_query_sq_timeout_status()
4021 for (se_idx = 0; se_idx < adev->gfx.config.max_shader_engines; se_idx++) { in gfx_v9_4_3_inst_reset_sq_timeout_status()
4064 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_4_3_inst_enable_watchdog_timer()
4304 if (adev->gfx.config.max_shader_engines * in gfx_v9_4_3_get_cu_info()
4309 adev->gfx.config.max_shader_engines, in gfx_v9_4_3_get_cu_info()
4315 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_4_3_get_cu_info()
H A Damdgpu_debugfs.c131 (se_bank != 0xFFFFFFFF && se_bank >= adev->gfx.config.max_shader_engines)) { in amdgpu_debugfs_process_reg_op()
257 (rd->id.grbm.se != 0xFFFFFFFF && rd->id.grbm.se >= adev->gfx.config.max_shader_engines)) { in amdgpu_debugfs_regs2_op()
888 config[no_regs++] = adev->gfx.config.max_shader_engines; in amdgpu_debugfs_gca_config_read()
H A Damdgpu_amdkfd.c487 cu_info->num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_amdkfd_get_cu_info()
H A Dgfx_v9_0.c1498 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_0_init_always_on_cu_mask()
2271 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_0_setup_rb()
2437 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_0_wait_for_rlc_serdes()
4355 int compute_dim_x = adev->gfx.config.max_shader_engines * in gfx_v9_0_do_edc_gpr_workarounds()
4359 int gpr_reg_size = adev->gfx.config.max_shader_engines + 6; in gfx_v9_0_do_edc_gpr_workarounds()
7217 if (adev->gfx.config.max_shader_engines * in gfx_v9_0_get_cu_info()
7222 adev->gfx.config.max_shader_engines, in gfx_v9_0_get_cu_info()
7226 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v9_0_get_cu_info()
H A Damdgpu_kms.c805 dev_info->num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
824 adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
H A Dgfxhub_v2_1.c549 adev->gfx.config.max_shader_engines); in gfxhub_v2_1_utcl2_harvest()
H A Damdgpu_atombios.c725 adev->gfx.config.max_shader_engines = gfx_info->info.max_shader_engines; in amdgpu_atombios_get_gfx_info()
H A Dgfx_v10_0.c4744 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v10_0_setup_rb()
4781 num_sc = adev->gfx.config.max_shader_engines * adev->gfx.config.max_sh_per_se * in gfx_v10_0_init_pa_sc_tile_steering_override()
4914 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v10_0_tcp_harvest()
9337 adev->gfx.config.max_shader_engines; in gfx_v10_0_set_gds_init()
9424 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v10_0_get_cu_info()
9480 adev->gfx.config.max_shader_engines); in gfx_v10_3_get_disabled_sa()
9489 uint32_t max_sa_per_se, max_sa_per_se_mask, max_shader_engines; in gfx_v10_3_program_pbb_mode() local
9496 max_shader_engines = adev->gfx.config.max_shader_engines; in gfx_v10_3_program_pbb_mode()
9498 for (se_index = 0; max_shader_engines > se_index; se_index++) { in gfx_v10_3_program_pbb_mode()
H A Damdgpu_amdkfd_gfx_v9.c1054 se_cnt = adev->gfx.config.max_shader_engines; in kgd_gfx_v9_get_cu_occupancy()
H A Damdgpu_discovery.c1453 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v1.gc_num_se); in amdgpu_discovery_get_gfx_info()
1488 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se); in amdgpu_discovery_get_gfx_info()
H A Dgfx_v11_0.c1571 adev->gfx.config.max_shader_engines); in gfx_v11_0_get_sa_active_bitmap()
1590 adev->gfx.config.max_shader_engines); in gfx_v11_0_get_rb_active_bitmap()
1610 max_sa = adev->gfx.config.max_shader_engines * in gfx_v11_0_setup_rb()
6266 adev->gfx.config.max_shader_engines; in gfx_v11_0_set_gds_init()
6348 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { in gfx_v11_0_get_cu_info()
/openbsd/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c889 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_cac_driving_se_didt_config()
940 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_psm_gc_didt_config()
1001 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_se_edc_config()
1049 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_psm_gc_edc_config()
/openbsd/sys/dev/pci/drm/amd/include/
H A Datomfirmware.h1756 uint8_t max_shader_engines; member
1776 uint8_t max_shader_engines; member
1801 uint8_t max_shader_engines; member
1836 uint8_t max_shader_engines; member
1877 uint8_t max_shader_engines; member
/openbsd/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c2276 adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines; in vangogh_post_smu_init()
2302 aon_bits = hweight32(tmp) * adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines; in vangogh_post_smu_init()

12