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Searched refs:mmCGTS_CU5_SP1_CTRL_REG (Results 1 – 9 of 9) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dmxgpu_vi.c200 mmCGTS_CU5_SP1_CTRL_REG, 0xffffffff, 0x00060005,
H A Dgfx_v8_0.c290 mmCGTS_CU5_SP1_CTRL_REG, 0xffffffff, 0x00060005,
564 mmCGTS_CU5_SP1_CTRL_REG, 0xffffffff, 0x00060005,
660 mmCGTS_CU5_SP1_CTRL_REG, 0xffffffff, 0x00060005,
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1513 #define mmCGTS_CU5_SP1_CTRL_REG 0xf024 macro
H A Dgfx_7_2_d.h1534 #define mmCGTS_CU5_SP1_CTRL_REG 0xf024 macro
H A Dgfx_8_0_d.h1727 #define mmCGTS_CU5_SP1_CTRL_REG 0xf024 macro
H A Dgfx_8_1_d.h1695 #define mmCGTS_CU5_SP1_CTRL_REG 0xf024 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6369 #define mmCGTS_CU5_SP1_CTRL_REG macro
H A Dgc_9_2_1_offset.h6603 #define mmCGTS_CU5_SP1_CTRL_REG macro
H A Dgc_9_1_offset.h6591 #define mmCGTS_CU5_SP1_CTRL_REG macro