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Searched refs:mmCP_STQ_WR_STAT (Results 1 – 9 of 9) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h549 #define mmCP_STQ_WR_STAT 0x21e4 macro
H A Dgfx_7_2_d.h562 #define mmCP_STQ_WR_STAT 0x21e4 macro
H A Dgfx_8_0_d.h615 #define mmCP_STQ_WR_STAT 0x21e4 macro
H A Dgfx_8_1_d.h615 #define mmCP_STQ_WR_STAT 0x21e4 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h249 #define mmCP_STQ_WR_STAT … macro
H A Dgc_9_2_1_offset.h243 #define mmCP_STQ_WR_STAT … macro
H A Dgc_9_1_offset.h249 #define mmCP_STQ_WR_STAT … macro
H A Dgc_10_1_0_offset.h2251 #define mmCP_STQ_WR_STAT … macro
H A Dgc_10_3_0_offset.h2334 #define mmCP_STQ_WR_STAT … macro