Home
last modified time | relevance | path

Searched refs:mmGC_CAC_IND_INDEX (Results 1 – 9 of 9) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dsoc15.c280 WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg)); in soc15_gc_cac_rreg()
291 WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg)); in soc15_gc_cac_wreg()
H A Dvi.c421 WREG32(mmGC_CAC_IND_INDEX, (reg)); in vi_gc_cac_rreg()
432 WREG32(mmGC_CAC_IND_INDEX, (reg)); in vi_gc_cac_wreg()
H A Dgfx_v10_0.c9520 WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL); in gfx_v10_3_set_power_brake_sequence()
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h2826 #define mmGC_CAC_IND_INDEX 0x129a macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2983 #define mmGC_CAC_IND_INDEX macro
H A Dgc_9_2_1_offset.h3167 #define mmGC_CAC_IND_INDEX macro
H A Dgc_9_1_offset.h3213 #define mmGC_CAC_IND_INDEX macro
H A Dgc_10_1_0_offset.h5487 #define mmGC_CAC_IND_INDEX macro
H A Dgc_10_3_0_offset.h5122 #define mmGC_CAC_IND_INDEX macro