Home
last modified time | relevance | path

Searched refs:mmGRBM_STATUS_SE3 (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h48 #define mmGRBM_STATUS_SE3 macro
H A Dgc_9_0_offset.h57 #define mmGRBM_STATUS_SE3 macro
H A Dgc_9_2_1_offset.h55 #define mmGRBM_STATUS_SE3 macro
H A Dgc_9_1_offset.h57 #define mmGRBM_STATUS_SE3 macro
H A Dgc_10_1_0_offset.h2061 #define mmGRBM_STATUS_SE3 macro
H A Dgc_10_3_0_offset.h2142 #define mmGRBM_STATUS_SE3 macro
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dnv.c342 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE3)},
H A Dsoc15.c363 { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS_SE3)},
H A Damdgpu_cik.c1049 {mmGRBM_STATUS_SE3},
H A Dvi.c672 {mmGRBM_STATUS_SE3},
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h779 #define mmGRBM_STATUS_SE3 0x200f macro
H A Dgfx_7_2_d.h792 #define mmGRBM_STATUS_SE3 0x200f macro
H A Dgfx_8_0_d.h867 #define mmGRBM_STATUS_SE3 0x200f macro
H A Dgfx_8_1_d.h866 #define mmGRBM_STATUS_SE3 0x200f macro