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Searched refs:mmPA_SC_RASTER_CONFIG_1 (Results 1 – 14 of 14) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dmxgpu_vi.c129 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002e,
272 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002A,
H A Dgfx_v8_0.c221 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002A,
317 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x0000002e,
348 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000,
380 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x0000002a,
395 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002A,
407 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x0000002e,
480 mmPA_SC_RASTER_CONFIG_1, 0x0000003f, 0x00000000,
495 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000,
591 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000,
696 mmPA_SC_RASTER_CONFIG_1, 0xffffffff, 0x00000000,
[all …]
H A Damdgpu_cik.c1118 {mmPA_SC_RASTER_CONFIG_1, true},
1138 case mmPA_SC_RASTER_CONFIG_1: in cik_get_register_value()
H A Dvi.c742 {mmPA_SC_RASTER_CONFIG_1, true},
761 case mmPA_SC_RASTER_CONFIG_1: in vi_get_register_value()
H A Dgfx_v7_0.c1736 WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1); in gfx_v7_0_write_harvested_raster_configs()
1782 WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1); in gfx_v7_0_setup_rb()
1800 RREG32(mmPA_SC_RASTER_CONFIG_1); in gfx_v7_0_setup_rb()
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1020 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
H A Dgfx_7_2_d.h1033 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
H A Dgfx_8_0_d.h1115 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
H A Dgfx_8_1_d.h1116 #define mmPA_SC_RASTER_CONFIG_1 0xa0d5 macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3583 #define mmPA_SC_RASTER_CONFIG_1 … macro
H A Dgc_9_2_1_offset.h3763 #define mmPA_SC_RASTER_CONFIG_1 … macro
H A Dgc_9_1_offset.h3813 #define mmPA_SC_RASTER_CONFIG_1 … macro
H A Dgc_10_1_0_offset.h5971 #define mmPA_SC_RASTER_CONFIG_1 … macro
H A Dgc_10_3_0_offset.h5602 #define mmPA_SC_RASTER_CONFIG_1 … macro