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Searched refs:mmSPI_SHADER_PGM_RSRC1_VS (Results 1 – 10 of 10) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1272 #define mmSPI_SHADER_PGM_RSRC1_VS 0x2C4A macro
H A Dgfx_7_0_d.h1660 #define mmSPI_SHADER_PGM_RSRC1_VS 0x2c4a macro
H A Dgfx_7_2_d.h1681 #define mmSPI_SHADER_PGM_RSRC1_VS 0x2c4a macro
H A Dgfx_8_0_d.h1874 #define mmSPI_SHADER_PGM_RSRC1_VS 0x2c4a macro
H A Dgfx_8_1_d.h1842 #define mmSPI_SHADER_PGM_RSRC1_VS 0x2c4a macro
/openbsd/sys/dev/pci/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1876 #define mmSPI_SHADER_PGM_RSRC1_VS … macro
H A Dgc_9_2_1_offset.h2095 #define mmSPI_SHADER_PGM_RSRC1_VS … macro
H A Dgc_9_1_offset.h2161 #define mmSPI_SHADER_PGM_RSRC1_VS … macro
H A Dgc_10_1_0_offset.h4139 #define mmSPI_SHADER_PGM_RSRC1_VS … macro
H A Dgc_10_3_0_offset.h3914 #define mmSPI_SHADER_PGM_RSRC1_VS … macro