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Searched refs:ARM_FEATURE_M (Results 1 – 20 of 20) sorted by relevance

/qemu/target/arm/
H A Dgdbstub.c52 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_gdb_read_register()
83 if (n == 13 && arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_gdb_write_register()
92 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_gdb_write_register()
329 [M_SYSREG_MSP] = { "msp", ARM_FEATURE_M },
330 [M_SYSREG_PSP] = { "psp", ARM_FEATURE_M },
331 [M_SYSREG_PRIMASK] = { "primask", ARM_FEATURE_M },
332 [M_SYSREG_CONTROL] = { "control", ARM_FEATURE_M },
524 if (!arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_register_gdb_regs_for_features()
544 if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) { in arm_cpu_register_gdb_regs_for_features()
H A Dcpu.c379 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_reset_hold()
1190 if (arm_feature(env, ARM_FEATURE_M)) { in arm_disas_set_info()
1401 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_dump_state()
1644 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_propagate_feature_implications()
1649 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_propagate_feature_implications()
1687 if (!arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_propagate_feature_implications()
1705 if (!arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_propagate_feature_implications()
1721 !arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_propagate_feature_implications()
2017 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_realizefn()
2039 if (arm_feature(env, ARM_FEATURE_M)) { in arm_cpu_realizefn()
[all …]
H A Dmachine.c269 return arm_feature(env, ARM_FEATURE_M); in m_needed()
346 return arm_feature(env, ARM_FEATURE_M) && arm_feature(env, ARM_FEATURE_V8); in m_v8m_needed()
489 return arm_feature(env, ARM_FEATURE_M); in pmsav7_rnr_needed()
519 !arm_feature(env, ARM_FEATURE_M); in pmsav8r_needed()
629 if (arm_feature(env, ARM_FEATURE_M)) { in get_cpsr()
685 if (arm_feature(env, ARM_FEATURE_M)) { in put_cpsr()
883 if (arm_feature(env, ARM_FEATURE_M) && cpu_isar_feature(aa32_lob, cpu)) { in cpu_post_load()
H A Dptw.c215 if (arm_feature(env, ARM_FEATURE_M)) { in regime_translation_disabled()
2283 if (!arm_feature(env, ARM_FEATURE_M)) { in get_phys_addr_pmsav7_default()
2323 return arm_feature(env, ARM_FEATURE_M) && in m_is_ppb_region()
2349 if (arm_feature(env, ARM_FEATURE_M)) { in pmsav7_use_background_region()
2504 if (arm_feature(env, ARM_FEATURE_M)) { in get_phys_addr_pmsav7()
2529 if (arm_feature(env, ARM_FEATURE_M)) { in get_phys_addr_pmsav7()
2632 if (arm_feature(env, ARM_FEATURE_M)) { in pmsav8_mpu_lookup()
2684 if (arm_feature(env, ARM_FEATURE_M)) { in pmsav8_mpu_lookup()
2696 if (arm_feature(env, ARM_FEATURE_M)) { in pmsav8_mpu_lookup()
2730 if (!arm_feature(env, ARM_FEATURE_M)) { in pmsav8_mpu_lookup()
[all …]
H A Ddebug_helper.c25 if (arm_feature(env, ARM_FEATURE_M)) { in arm_debug_target_el()
444 if (arm_feature(env, ARM_FEATURE_M)) { in arm_debug_exception_fsr()
H A Dcpu.h2354 ARM_FEATURE_M, /* Microcontroller profile. */ enumerator
2452 assert(!arm_feature(env, ARM_FEATURE_M)); in arm_is_el3_or_mon()
2647 if (arm_feature(env, ARM_FEATURE_M)) { in arm_current_el()
H A Dinternals.h791 if (arm_feature(env, ARM_FEATURE_M)) { in core_to_arm_mmu_idx()
H A Dvfp_helper.c208 if (!arm_feature(env, ARM_FEATURE_M)) { in HELPER()
H A Dhelper.c6170 if (arm_feature(env, ARM_FEATURE_M)) { in arm_hcr_el2_eff()
8705 if (arm_feature(env, ARM_FEATURE_M)) { in register_cp_regs_for_features()
10250 !arm_feature(&cpu->env, ARM_FEATURE_M)) { in define_one_arm_cp_reg_with_opaque()
11808 assert(!arm_feature(env, ARM_FEATURE_M)); in arm_cpu_do_interrupt()
12432 if (arm_feature(env, ARM_FEATURE_M)) { in fp_exception_el()
12562 if (arm_feature(env, ARM_FEATURE_M)) { in arm_mmu_idx_el()
12654 if (arm_feature(env, ARM_FEATURE_M)) { in cpu_get_tb_cpu_state()
12838 if (arm_feature(env, ARM_FEATURE_M)) { in arm_security_space()
12870 assert(!arm_feature(env, ARM_FEATURE_M)); in arm_security_space_below_el3()
/qemu/target/arm/tcg/
H A Dcpu-v7m.c50 set_feature(&cpu->env, ARM_FEATURE_M); in cortex_m0_initfn()
83 set_feature(&cpu->env, ARM_FEATURE_M); in cortex_m3_initfn()
109 set_feature(&cpu->env, ARM_FEATURE_M); in cortex_m4_initfn()
139 set_feature(&cpu->env, ARM_FEATURE_M); in cortex_m7_initfn()
169 set_feature(&cpu->env, ARM_FEATURE_M); in cortex_m33_initfn()
204 set_feature(&cpu->env, ARM_FEATURE_M); in cortex_m55_initfn()
H A Dtranslate.c4612 if (arm_dc_feature(s, ARM_FEATURE_M)) { in DO_CRC32()
4621 if (arm_dc_feature(s, ARM_FEATURE_M)) { in trans_MSR_bank()
4632 if (arm_dc_feature(s, ARM_FEATURE_M)) { in trans_MRS_reg()
4654 if (arm_dc_feature(s, ARM_FEATURE_M)) { in trans_MSR_reg()
4810 if (arm_dc_feature(s, ARM_FEATURE_M) && in trans_BKPT()
6568 if (arm_dc_feature(s, ARM_FEATURE_M)) { in trans_BLX_i()
7279 if (arm_dc_feature(s, ARM_FEATURE_M)) { in disas_arm_insn()
7369 arm_dc_feature(s, ARM_FEATURE_M)) { in thumb_insn_is_16bit()
7399 if (arm_dc_feature(s, ARM_FEATURE_M) && in disas_thumb2_insn()
7432 if (arm_dc_feature(s, ARM_FEATURE_M)) { in disas_thumb2_insn()
[all …]
H A Dtranslate-m-nocp.c39 if (!arm_dc_feature(s, ARM_FEATURE_M) || in trans_VLLDM_VLSTM()
734 assert(arm_dc_feature(s, ARM_FEATURE_M)); in trans_NOCP()
H A Dtlb_helper.c95 if (!arm_feature(env, ARM_FEATURE_M) && in compute_fsr_fsc()
H A Dop_helper.c139 if (arm_feature(env, ARM_FEATURE_M) in handle_possible_div0_trap()
325 if (arm_feature(env, ARM_FEATURE_M)) { in check_wfx_trap()
H A Dhflags.c418 } else if (arm_feature(env, ARM_FEATURE_M)) { in rebuild_hflags_internal()
H A Dtranslate-vfp.c250 assert(!arm_dc_feature(s, ARM_FEATURE_M)); in vfp_access_check_a()
299 if (arm_dc_feature(s, ARM_FEATURE_M)) { in vfp_access_check()
754 if (arm_dc_feature(s, ARM_FEATURE_M)) { in trans_VMSR_VMRS()
/qemu/linux-user/arm/
H A Dtarget_cpu.h26 if (arm_feature(&cpu->env, ARM_FEATURE_M)) { in arm_max_reserved_va()
H A Dtarget_proc.h40 if (arm_feature(&cpu->env, ARM_FEATURE_M)) { in open_cpuinfo()
/qemu/linux-user/
H A Delfload.c475 if (arm_feature(&cpu->env, ARM_FEATURE_M)) { in init_guest_commpage()
646 if (arm_feature(env, ARM_FEATURE_M)) { in get_elf_platform()
/qemu/hw/intc/
H A Darmv7m_nvic.c2678 if (!s->cpu || !arm_feature(&s->cpu->env, ARM_FEATURE_M)) { in armv7m_nvic_realize()