Home
last modified time | relevance | path

Searched refs:XCHAL_VECBASE_RESET_VADDR (Results 1 – 12 of 12) sorted by relevance

/qemu/tests/tcg/xtensa/
H A Dlinker.ld.S3 #ifndef XCHAL_VECBASE_RESET_VADDR
4 #define XCHAL_VECBASE_RESET_VADDR XCHAL_WINDOW_VECTORS_VADDR macro
25 ram : ORIGIN = XCHAL_VECBASE_RESET_VADDR, LENGTH = RAM_SIZE
103 .vector.text XCHAL_VECBASE_RESET_VADDR + VECTORS_RESERVED_SIZE :
H A Dtest_sr.S224 movi a2, XCHAL_VECBASE_RESET_VADDR
/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h384 #define XCHAL_VECBASE_RESET_VADDR 0xD0000000 /* VECBASE reset value */ macro
/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h333 #define XCHAL_VECBASE_RESET_VADDR 0xD0000000 /* VECBASE reset value */ macro
/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h392 #define XCHAL_VECBASE_RESET_VADDR 0x40000000 /* VECBASE reset value */ macro
/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h368 #define XCHAL_VECBASE_RESET_VADDR 0x5FFE0400 /* VECBASE reset value */ macro
/qemu/target/xtensa/
H A Doverlay_tool.h72 #define XCHAL_VECBASE_RESET_VADDR 0 macro
329 .vecbase = XCHAL_VECBASE_RESET_VADDR, \
/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h383 #define XCHAL_VECBASE_RESET_VADDR 0x00002000 /* VECBASE reset value */ macro
/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h466 #define XCHAL_VECBASE_RESET_VADDR 0x00002000 /* VECBASE reset value */ macro
/qemu/target/xtensa/core-de212/
H A Dcore-isa.h502 #define XCHAL_VECBASE_RESET_VADDR 0x60000000 /* VECBASE reset value */ macro
/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h523 #define XCHAL_VECBASE_RESET_VADDR 0x40000000 /* VECBASE reset value */ macro
/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h605 #define XCHAL_VECBASE_RESET_VADDR 0x00002000 /* VECBASE reset value */ macro