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Searched refs:float64_muladd (Results 1 – 21 of 21) sorted by relevance

/qemu/target/riscv/
H A Dfpu_helper.c150 return float64_muladd(frs1, frs2, frs3, 0, &env->fp_status); in helper_fmadd_d()
168 return float64_muladd(frs1, frs2, frs3, float_muladd_negate_c, in helper_fmsub_d()
187 return float64_muladd(frs1, frs2, frs3, float_muladd_negate_product, in helper_fnmsub_d()
207 return float64_muladd(frs1, frs2, frs3, float_muladd_negate_c | in helper_fnmadd_d()
H A Dvector_helper.c3163 return float64_muladd(a, b, d, 0, s); in fmacc64()
3203 return float64_muladd(a, b, d, float_muladd_negate_c | in fnmacc64()
3232 return float64_muladd(a, b, d, float_muladd_negate_c, s); in fmsac64()
3260 return float64_muladd(a, b, d, float_muladd_negate_product, s); in fnmsac64()
3288 return float64_muladd(d, b, a, 0, s); in fmadd64()
3318 return float64_muladd(d, b, a, float_muladd_negate_c | in fnmadd64()
3347 return float64_muladd(d, b, a, float_muladd_negate_c, s); in fmsub64()
3375 return float64_muladd(d, b, a, float_muladd_negate_product, s); in fnmsub64()
3400 return float64_muladd(float32_to_float64(a, s), in fwmacc32()
3457 return float64_muladd(float32_to_float64(a, s), in fwmsac32()
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/qemu/target/xtensa/
H A Dfpu_helper.c211 return float64_muladd(b, c, a, 0, &env->fp_status); in HELPER()
223 return float64_muladd(b, c, a, float_muladd_negate_product, in HELPER()
/qemu/target/hppa/
H A Dfpu_helper.c439 float64 ret = float64_muladd(a, b, c, 0, &env->fp_status); in HELPER()
446 float64 ret = float64_muladd(a, b, c, float_muladd_negate_product, in HELPER()
/qemu/target/s390x/tcg/
H A Dfpu_helper.c792 float64 ret = float64_muladd(f2, f3, f1, 0, &env->fpu_status); in HELPER()
811 float64 ret = float64_muladd(f2, f3, f1, float_muladd_negate_c, in HELPER()
H A Dvec_fpu_helper.c651 const float64 ret = float64_muladd(a, b, c, flags, &env->fpu_status); in vfma64()
/qemu/tests/fp/
H A Dfp-bench.c370 res.f64 = float64_muladd(a, b, c, 0, &soft_status); in bench()
H A Dwrap.c.inc574 WRAP_MULADD(qemu_f64_mulAdd, float64_muladd, float64)
/qemu/target/sparc/
H A Dfop_helper.c357 float64 ret = float64_muladd(s1, s2, s3, op, &env->fp_status); in helper_fmaddd()
/qemu/target/arm/tcg/
H A Dhelper-a64.c261 return float64_muladd(a, b, float64_two, 0, fpst); in HELPER()
306 return float64_muladd(a, b, float64_three, float_muladd_halve_result, fpst); in HELPER()
H A Dvec_helper.c1017 d[i] = float64_muladd(e2, e1, a[i], 0, fpst); in HELPER()
1018 d[i + 1] = float64_muladd(e4, e3, a[i + 1], 0, fpst); in HELPER()
1415 return float64_muladd(op1, op2, dest, 0, stat); in float64_muladd_f()
1433 return float64_muladd(float64_chs(op1), op2, dest, 0, stat); in float64_mulsub_f()
H A Dsme_helper.c951 *a = float64_muladd(n, zm[col], *a, 0, &fpst); in HELPER()
H A Dsve_helper.c4847 r = float64_muladd(e1, e2, e3, 0, status); in do_fmla_zpzzz_d()
5049 d[i] = float64_muladd(n[i], mm, coeff[xx], 0, vs); in HELPER()
5280 d = float64_muladd(e2, e1, d, 0, status); in HELPER()
5285 d = float64_muladd(e4, e3, d, 0, status); in HELPER()
/qemu/target/loongarch/tcg/
H A Dfpu_helper.c397 fd = float64_muladd(fj, fk, fa, flag, &env->fp_status); in helper_fmuladd_d()
H A Dvec_helper.c2458 DO_4OP_F(vfmadd_d, 64, UD, float64_muladd, 0)
2460 DO_4OP_F(vfmsub_d, 64, UD, float64_muladd, float_muladd_negate_c)
2462 DO_4OP_F(vfnmadd_d, 64, UD, float64_muladd, float_muladd_negate_result)
2465 DO_4OP_F(vfnmsub_d, 64, UD, float64_muladd,
/qemu/target/arm/
H A Dvfp_helper.c1008 return float64_muladd(a, b, c, 0, fpst); in VFP_HELPER()
/qemu/target/mips/tcg/
H A Dfpu_helper.c1732 fdret = float64_muladd(fs, ft, fd, 0, in helper_float_maddf_d()
1756 fdret = float64_muladd(fs, ft, fd, float_muladd_negate_product, in helper_float_msubf_d()
/qemu/include/fpu/
H A Dsoftfloat.h794 float64 float64_muladd(float64, float64, float64, int, float_status *status);
/qemu/target/i386/
H A Dops_sse.h2530 SSE_HELPER_FMAS(helper_fma4sd, ZMM_D, float64_muladd) in SSE_HELPER_FMAS()
2535 SSE_HELPER_FMAP(helper_fma4pd, ZMM_D, 1 << SHIFT, float64_muladd) in SSE_HELPER_FMAS()
/qemu/target/ppc/
H A Dfpu_helper.c651 float64 ret = float64_muladd(a, b, c, madd_flags, &env->fp_status); in do_fmadd()
3463 at[i].VsrDF(j) = float64_muladd(a[i / 2].VsrDF(i % 2), b->VsrDF(j), in vsxger_muladd64()
/qemu/fpu/
H A Dsoftfloat.c2330 float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s) in float64_muladd() function