Searched refs:nsacr (Results 1 – 6 of 6) sorted by relevance
| /qemu/target/arm/tcg/ |
| H A D | m_helper.c | 385 } else if (!is_secure && !extract32(env->v7m.nsacr, 10, 1)) { in HELPER()
1190 bool nsacr_cp10 = extract32(env->v7m.nsacr, 10, 1); in v7m_push_stack()
1542 extract32(env->v7m.nsacr, 10, 1); in do_v7m_exception_exit()
1768 extract32(env->v7m.nsacr, 10, 1); in do_v7m_exception_exit()
2639 extract32(env->v7m.nsacr, 10, 1)) { in HELPER()
2764 extract32(env->v7m.nsacr, 10, 1))) { in HELPER()
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| /qemu/target/arm/ |
| H A D | cpu.c | 415 env->v7m.nsacr = 0xcff; in arm_cpu_reset_hold()
480 env->v7m.nsacr = 0xcff; in arm_cpu_reset_hold()
643 env->cp15.nsacr |= 3 << 10; in arm_emulate_firmware_reset()
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| H A D | helper.c | 795 !arm_is_secure(env) && !extract32(env->cp15.nsacr, 10, 1)) { in cpacr_write()
812 !arm_is_secure(env) && !extract32(env->cp15.nsacr, 10, 1)) { in cpacr_read()
9386 static const ARMCPRegInfo nsacr = { in register_cp_regs_for_features() local
9392 define_one_arm_cp_reg(cpu, &nsacr); in register_cp_regs_for_features()
9394 static const ARMCPRegInfo nsacr = { in register_cp_regs_for_features() local
9399 .fieldoffset = offsetof(CPUARMState, cp15.nsacr) in register_cp_regs_for_features()
9401 define_one_arm_cp_reg(cpu, &nsacr); in register_cp_regs_for_features()
9405 static const ARMCPRegInfo nsacr = { in register_cp_regs_for_features() local
9411 define_one_arm_cp_reg(cpu, &nsacr); in register_cp_regs_for_features()
12439 if (!extract32(env->v7m.nsacr, 10, 1)) { in fp_exception_el()
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| H A D | machine.c | 371 VMSTATE_UINT32(env.v7m.nsacr, ARMCPU),
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| H A D | cpu.h | 292 uint32_t nsacr; /* Non-secure access control register. */ member
568 uint32_t nsacr; member
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| /qemu/hw/intc/ |
| H A D | armv7m_nvic.c | 1352 return cpu->env.v7m.nsacr; in nvic_readl()
1825 cpu->env.v7m.nsacr = value & (3 << 10); in nvic_writel()
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