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Searched refs:FRS1 (Results 1 – 25 of 110) sorted by relevance

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/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/insns/
H A Dfmin_q.h3 bool less = f128_lt_quiet(f128(FRS1), f128(FRS2)) ||
4 (f128_eq(f128(FRS1), f128(FRS2)) && (f128(FRS1).v[1] & F64_SIGN));
5 if (isNaNF128(f128(FRS1)) && isNaNF128(f128(FRS2)))
8 WRITE_FRD(less || isNaNF128(f128(FRS2)) ? FRS1 : FRS2);
H A Dfmin_s.h3 bool less = f32_lt_quiet(f32(FRS1), f32(FRS2)) ||
4 (f32_eq(f32(FRS1), f32(FRS2)) && (f32(FRS1).v & F32_SIGN));
5 if (isNaNF32UI(f32(FRS1).v) && isNaNF32UI(f32(FRS2).v))
8 WRITE_FRD(less || isNaNF32UI(f32(FRS2).v) ? FRS1 : FRS2);
H A Dfmin_d.h3 bool less = f64_lt_quiet(f64(FRS1), f64(FRS2)) ||
4 (f64_eq(f64(FRS1), f64(FRS2)) && (f64(FRS1).v & F64_SIGN));
5 if (isNaNF64UI(f64(FRS1).v) && isNaNF64UI(f64(FRS2).v))
8 WRITE_FRD(less || isNaNF64UI(f64(FRS2).v) ? FRS1 : FRS2);
H A Dfmax_q.h3 bool greater = f128_lt_quiet(f128(FRS2), f128(FRS1)) ||
4 (f128_eq(f128(FRS2), f128(FRS1)) && (f128(FRS2).v[1] & F64_SIGN));
5 if (isNaNF128(f128(FRS1)) && isNaNF128(f128(FRS2)))
8 WRITE_FRD(greater || isNaNF128(f128(FRS2)) ? FRS1 : FRS2);
H A Dfmax_d.h3 bool greater = f64_lt_quiet(f64(FRS2), f64(FRS1)) ||
4 (f64_eq(f64(FRS2), f64(FRS1)) && (f64(FRS2).v & F64_SIGN));
5 if (isNaNF64UI(f64(FRS1).v) && isNaNF64UI(f64(FRS2).v))
8 WRITE_FRD(greater || isNaNF64UI(f64(FRS2).v) ? FRS1 : FRS2);
H A Dfmax_s.h3 bool greater = f32_lt_quiet(f32(FRS2), f32(FRS1)) ||
4 (f32_eq(f32(FRS2), f32(FRS1)) && (f32(FRS2).v & F32_SIGN));
5 if (isNaNF32UI(f32(FRS1).v) && isNaNF32UI(f32(FRS2).v))
8 WRITE_FRD(greater || isNaNF32UI(f32(FRS2).v) ? FRS1 : FRS2);
H A Dvfmv_s_f.h16 P.VU.elt<uint16_t>(rd_num, 0, true) = f16(FRS1).v;
19 P.VU.elt<uint32_t>(rd_num, 0, true) = f32(FRS1).v;
23 P.VU.elt<uint64_t>(rd_num, 0, true) = f64(FRS1).v;
25 P.VU.elt<uint64_t>(rd_num, 0, true) = f32(FRS1).v;
H A Dvfslide1up_vf.h26 P.VU.elt<float16_t>(rd_num, 0, true) = f16(FRS1);
29 P.VU.elt<float32_t>(rd_num, 0, true) = f32(FRS1);
32 P.VU.elt<float64_t>(rd_num, 0, true) = f64(FRS1);
H A Dvfslide1down_vf.h26 P.VU.elt<float16_t>(rd_num, vl - 1, true) = f16(FRS1);
29 P.VU.elt<float32_t>(rd_num, vl - 1, true) = f32(FRS1);
32 P.VU.elt<float64_t>(rd_num, vl - 1, true) = f64(FRS1);
H A Dfclass_d.h3 WRITE_RD(f64_classify(f64(FRS1)));
H A Dfclass_q.h3 WRITE_RD(f128_classify(f128(FRS1)));
H A Dfclass_s.h3 WRITE_RD(f32_classify(f32(FRS1)));
H A Dfmv_x_d.h4 WRITE_RD(FRS1.v[0]);
H A Dfsgnjx_d.h3 WRITE_FRD(fsgnj64(FRS1, FRS2, false, true));
H A Dfsgnjx_q.h3 WRITE_FRD(fsgnj128(FRS1, FRS2, false, true));
H A Dfsgnj_d.h3 WRITE_FRD(fsgnj64(FRS1, FRS2, false, false));
H A Dfsgnj_s.h3 WRITE_FRD(fsgnj32(FRS1, FRS2, false, false));
H A Dfsgnjn_q.h3 WRITE_FRD(fsgnj128(FRS1, FRS2, true, false));
H A Dfsgnjx_s.h3 WRITE_FRD(fsgnj32(FRS1, FRS2, false, true));
H A Dfmv_x_w.h3 WRITE_RD(sext32(FRS1.v[0]));
H A Dfsgnj_q.h3 WRITE_FRD(fsgnj128(FRS1, FRS2, false, false));
H A Dfsgnjn_d.h3 WRITE_FRD(fsgnj64(FRS1, FRS2, true, false));
H A Dfsgnjn_s.h3 WRITE_FRD(fsgnj32(FRS1, FRS2, true, false));
H A Dfclass_h.h3 WRITE_RD(f16_classify(f16(FRS1)));
/dports/lang/smalltalk/smalltalk-3.2.5/lightning/sparc/
H A Dasm.h327 #define FADDSrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 65, (FRS2)) argument
328 #define FSUBSrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 69, (FRS2)) argument
329 #define FMULSrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 73, (FRS2)) argument
330 #define FDIVSrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 77, (FRS2)) argument
332 #define FADDDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 66, (FRS2)) argument
333 #define FSUBDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 70, (FRS2)) argument
334 #define FMULDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 74, (FRS2)) argument
335 #define FDIVDrrr(FRS1, FRS2, FRD) _FP1((FRD), (FRS1), 78, (FRS2)) argument
337 #define FCMPSrr(FRS1, FRS2) _FP2(0, (FRS1), 81, (FRS2)) argument
338 #define FCMPDrr(FRS1, FRS2) _FP2(0, (FRS1), 82, (FRS2)) argument

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